• Title/Summary/Keyword: Polishing Process

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Silicon-Wafer Direct Bonding for Single-Crystal Silicon-on-Insulator Transducers and Circuits (단결정 SOI트랜스듀서 및 회로를 위한 Si직접접합)

  • Chung, Gwiy-Sang;Nakamura, Tetsuro
    • Journal of Sensor Science and Technology
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    • v.1 no.2
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    • pp.131-145
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    • 1992
  • This paper has been described a process technology for the fabrication of Si-on-insulator(SOI) transducers and circuits. The technology utilizes Si-wafer direct bonding(SDB) and mechanical-chemical(M-C) local polishing to create a SOI structure with a high-qualify, uniformly thin layer of single-crystal Si. The electrical and piezoresistive properties of the resultant thin SOI films have been investigated by SOI MOSFET's and cantilever beams, and confirmed comparable to those of bulk Si. Two kinds of pressure transducers using a SOI structure have been proposed. The shifts in sensitivity and offset voltage of the implemented pressure transducers using interfacial $SiO_{2}$ films as the dielectrical isolation layer of piezoresistors were less than -0.2% and +0.15%, respectively, in the temperature range from $-20^{\circ}C$ to $+350^{\circ}C$. In the case of pressure transducers using interfacial $SiO_{2}$ films as an etch-stop layer during the fabrication of thin Si membranes, the pressure sensitivity variation can be controlled to within a standard deviation of ${\pm}2.3%$ from wafer to wafer. From these results, the developed SDB process and the resultant SOI films will offer significant advantages in the fabrication of integrated microtransducers and circuits.

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Fabrication and characteristics of electrostatic micro mirror for optical disk drives (광 저장장치 응용을 위한 마이크로 미러의 제작과 그 특성)

  • Kim, Jong-Wan;Seo, Hwa-Il;Lee, Woo-Young;Rim, Kyung-Hwa;Jang, Young-Jo
    • Journal of Sensor Science and Technology
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    • v.11 no.1
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    • pp.39-47
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    • 2002
  • Optical disk drives read information by replacing a laser beam on the disk track. As information has become larger, the more accurate position control of a laser beam is necessary. In this paper, we report the analysis and fabrication of the micro mirror for optical disk drivers. The mirror was fabricated by using MEMS technology. Especially, the Process using the lapping and polishing step after the bonding of the mirror and electrode plates was employed for the process reliability. The mirror size was $2.5mm{\times}3mm$ and it needed about 35V for displacement of $3.2{\mu}m$.

Fabrication of SOI Structures with Buried Cavities for Microsystems SDB and Electrochemical Etch-stop (SDB와 전기화학적 식각정지에 의한 마이크로 시스템용 매몰 공동을 갖는 SOI 구조의 제조)

  • Chung, Gwiy-Sang;Kang, Kyung-Doo;Choi, Sung-Kyu
    • Journal of Sensor Science and Technology
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    • v.11 no.1
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    • pp.54-59
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    • 2002
  • This paper describes a new process technique for batch process of SOI(Si-on-Insulator) structures with buried cavities for MEMS(Micro Electro Mechanical System) applications by SDB(Si-wafer Direct Bonding) technology and electrochemical etch-stop. A low-cost electrochemical etch-stop method is used to control accurately the thickness of SOI. The cavities were made on the upper handling wafer by Si anisotropic etching. Two wafers are bonded with an intermediate insulating oxide layer. After high-temperature annealing($1000^{\circ}C$, 60 min), the SDB SOI structure with buried cavities was thinned by electrochemical etch-stop. The surface of the fabricated SDB SOI structure have more roughness that of lapping and polishing by mechanical method. This SDB SOI structure with buried cavities will provide a powerful and versatile substrate for novel microsensors arid microactuators.

CMP of BTO Thin Films using Mixed Abrasive slurry (연마제 첨가를 통한 BTO Film의 CMP)

  • Kim, Byeong-In;Lee, Gi-Sang;Park, Jeong-Gi;Jeong, Chang-Su;Gang, Yong-Cheol;Cha, In-Su;Jeong, Pan-Geom;Sin, Seong-Heon;Go, Pil-Ju;Lee, U-Seon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.05a
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    • pp.101-102
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    • 2006
  • BTO ($BaTiO_3$) thin film is one of the high dielectric materials for high-density dynamic random access memories (DRAMs) due to its relatively high dielectric constant, It is generally known that BTO film is difficult to be etched by plasma etching, but high etch rate with good selectivity to pattern mask was required. The problem of sidewall angle also still remained to be solved in plasma etching of BTO thin film. In this study, we first examined the patterning possibility of BTO film by chemical mechanical polishing (CMP) process instead of plasma etching. The sputtered BTO film on TEOS film as a stopper layer was polished by CMP process with the sell-developed $BaTiO_3$- and $TiO_2$-mixed abrasives slurries (MAS). respectively. The removal rate of BTO thin film using the $BaTiO_3$-mixed abrasive slurry ($BaTiO_3$-MAS) was higher than that using the $TiO_2$-mixed abrasive slurry ($TiO_2$-MAS) in the same concentrations. The maximum removal rate of BTO thin film was 848 nm/min with an addition of $BaTiO_3$ abrasive at the concentration of 3 wt%.

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Correlation between Ceria abrasive accumulation on pad surface and Material Removal in Oxide CMP (산화막 CMP에서 세리아 입자의 패드 표면누적과 재료제거 관계)

  • Kim, Young-Jin;Park, Boum-Young;Jeong, Hae-Do
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.118-118
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    • 2008
  • The oxide CMP has been applied to interlayer dielectric(ILD) and shallow trench isolation (STI) in chip fabrication. Recently the slurry used in oxide CMP being changed from silica slurry to ceria (cerium dioxide) slurry particularly in STI CMP, because the material selectivity of ceria slurry is better than material selectivity of silica slurry. Moreover, the ceria slurry has good a planarization efficiency, compared with silica slurry. However ceria abrasives make a material removal rate too high at the region of wafer center. Then we focuses on why profile of material removal rate is convex. The material removal rate sharply increased to 3216 $\AA$/min by $4^{th}$ run without conditioning. After $4^{th}$ run, material removal rate converged. Furthermore, profile became more convex during 12 run. And average material removal rate decreased when conditioning process is added to end of CMP process. This is due to polishing mechanism of ceria. Then the ceria abrasive remains at the pad, in particular remains more at wafer center contacted region of pad. The field emission scanning electron microscopy (FE-SEM) images showed that the pad sample in the wafer center region has a more ceria abrasive than in wafer outer region. The energy dispersive X-ray spectrometer (EDX) verified the result that ceria abrasive is deposited and more at the region of wafer center. Therefore, this result may be expected as ceria abrasives on pad surface causing the convex profile of material removal rate.

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Purification and Characterization of Paclitaxel from Plant Cell Cultures of Taxus chinensis in Large-Scale Process (식물세포 Taxus chinensis 배양으로부터의 Paclitaxel 대량 정제 및 특성)

  • 김진현;기은숙;민범찬;최형균;홍승서;이현수
    • KSBB Journal
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    • v.15 no.5
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    • pp.537-540
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    • 2000
  • In developing a HPLC purification process, it was hoped that a single chromatographic system would be sufficient to abtain pure paclitaxel in high yield. However, no such system was found, due in part to the complex taxoid profile of crude paclitaxel and to the rigorous nature of the product specification. A two step HPLC purification was adopted using reverse-phase separation on C(sub)18 as a first step, and normal-phase separation on silica as the final polishing step. Impurity profiles were established and maintained for paclitaxel, which identified and quantified each impurity observed in purified paclitaxel from these two steps, all impurities at or above 0.1% were identified. Results provide information for improving the quality control of paclitaxel production.

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Utilizing Advanced Pad Conditioning and Pad Motion in WCMP

  • Kim, Sang-Yong;Chung, Hun-Sang;Park, Min-Woo;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.171-175
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    • 2001
  • Chemical mechanical polishing(CMP) process has been widely used to planarize dielectrics and metal, which can apply to employed in integrated circuits for sub-micron technology. Despite the increased use of CMP process, it is difficult to accomplish the global planarization of free-defects in inter level dielectrics and metal. Especially, defects like (micro-scratch) lead to severe circuit failure, and affects yield. Current conditioning method - bladder type, orbital pad motion - usually provides unsuitable pad profile during ex-situ conditioning near the end of pad life. Since much of the pad wear occurs by the mechanism of bladder tripe conditioning and its orbital motion without rotation, we need to implement new ex-situ conditioner which can prevent abnormal regional force on pad caused by bladder-type and also need to rotate the pad during conditioning. Another important study of ADPC is related to the orbital scratch of which source is assumed as diamond grit dropped from the strip during ex-situ conditioning. Scratch from diamond grit damaged wafer severely so usual1y scraped. Figure 1 shows the typical shape of scratch damaged from diamond. We suspected that intensive forces to the edge area of bladder type stripper accelerated the drop of Diamond grit during conditioning, so new designed Flat stripper was introduced.

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Slurry Characteristics by Surfactant Condition at Copper CMP (구리 CMP 공정시 계면활성제 첨가 조건에 의한 슬러리 특성)

  • Kim, In-Pyo;Kim, Nam-Hoon;Lim, Jong-Heun;Kim, Sang-Yong;Kim, Tae-Hyoung;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.166-169
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    • 2003
  • In this study, we evaluated the characteristics by the addition of 3 different kinds of nonionic surfactant to improve the dispersion stability of slurries. Slurry stability is an issue in any industry in which settling of particles can result in poor performance. So we observed the variation of particle size and settling rate when the concentration and addition time of surfactant are changed. When the surfactant is added after milling process, the particle size and pH became low. It is supposed that the particle agglomeration was disturbed by adsorption of surfactant on alumina abrasive. The settling rate was relatively stable when nonionic surfactant is added about 0.1~1.0 wt%. When molecular weight(MW) is too small like Brij 35, it was appeared low effect on dispersion stability. Because it can't prevent coagulation and subsequent settling with too small MW. The proper quality of MW for slurry stability was presented about 500,000. Consequently, the addition of nonionic surfactant to alumina slurry has been shown to have very good effect on slurry stabilization. If we apply this results to copper CMP process, it is thought that we will be able to obtain better yield.

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Preventing Plasma Degradation of Plasma Resistant Ceramics via Surface Polishing (내플라즈마성 세라믹의 표면연마를 통한 플라즈마 열화방지)

  • Jae Ho Choi;Young Min Byun;Hyeong Jun Kim
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.3
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    • pp.130-135
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    • 2023
  • Plasma-resistant ceramic (PRC) is a material used to prevent internal damage in plasma processing equipment for semiconductors and displays. The challenge is to suppress particles falling off from damaged surfaces and increase retention time in order to improve productivity and introduce the latest miniaturization process. Here, we confirmed the effect of suppressing plasma deterioration and reducing the etch rate through surface treatment of existing PRC with an initial illumination level of 200 nm. In particular, quartz glass showed a decrease in etch rate of up to 10%. Furthermore, it is believed that micro-scale secondary particles formed on the microstructure of each material grow as crystals during the fluoridation process. This is a factor that can act as a killer defect when dropped, and is an essential consideration when analyzing plasma resistance. The plasma etching suppression effect of the initial illumination is thought to be due to partial over etching at the dihedral angle of the material due to the sputtering of re-emission of Ar+-based cations. This means that plasma damage due to densification can also be interpreted in existing PRC studies. The research results are significant in that they present surface treatment conditions that can be directly applied to existing PRC for mass production and a new perspective to analyze plasma resistance in addition to simple etching rates.

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Isolation of Functional Fatty Acid in Cosolvent Induced SFE Process (공용매가 첨가된 초임계유체 추출공정에서 기능성 지방산의 추출)

  • Lee, Seung Bum;Park, Kyung Ai;Hong, In Kwon
    • Applied Chemistry for Engineering
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    • v.10 no.3
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    • pp.438-444
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    • 1999
  • The natural full-fat rice bran is reported to contain 8.4 to 14.7 wt % Lipids, but the amount and composition of bran depend on the type of rice, quality of paddy, pretreatments to paddy such as parboiling, type of milling system employed, and the degree of polishing. These lipids are usually mixtures of several class fatty acids containing palmitic acid, linolenic acid, linoleic acid, oleic acid, stearic acid, tocopherol, squalene, etc. In this study the oil rich essential fatty acid (EFA) including squalene was extracted from the domestic brown rice bran using supercritical fluid extraction (SFE) and cosolvent induced SFE process, respectively. And the extracts were analyzed with GC-MSD. The extracted amount of rice bran oil was dependent upon the operating pressure and temperature, and the fatty acid composition of oil was varied with the reduced density (${\rho}_{\gamma}$) of supercritical carbon dioxide. About 70~80% of rice bran oil was extracted in 4hrs. The cosolvent induced SFE process shortened the total extraction time, extracted greater amount of oil than SFE process. Especially squalene which was not found in solvent extract phase was identified in SFE and cosolvent induced SFE process.

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