• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
• /
• pp.142-144
• /
• 2009

We demonstrated narrow and good aspect-ratio inkjet-printed silver lines with multi-time over-printing methods. By using this strategy, narrow silver lines were obtained with 200 nm thickness and their width and gap between printed lines of uniform narrow silver lines were 30 ${\mu}m$ and 17 ${\mu}m$, respectively. It also had good conductivity, sheet resistacne of 0.36 ${\Omega}/{\square}$ and specific resistance of $8{\mu}{\Omega}{\cdot}cm$. In current stress test, narrow silver line with 30 ${\mu}m$ width was able to a current flow up to 50 mA (2.1A/$cm^2$). Using surface treatment on poly-arylate substrate with $UVO_3$, we obtained clean-edge narrow line without any edge waviness.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
• /
• pp.311-311
• /
• 2013

The resistance switching memory devices have several advantages to take breakthrough for the limitation of operation speed, retention, and device scale. Especially, the metal-oxide materials such as ZnO are able to fabricate on the flexible and visible transparent plastic substrate. Also, the quantum dots (QDs) embedded in dielectric layer could be improve the ratio between the low and the high resistance becauseof their Coulomb blockade, carrier trap and induced filament path formation. In this study, we irradiated 0.2-MeV-electron beam on the ZnO/QDs/ZnO structure to control the defect and oxygen vacancy of ZnO layer. The metal-oxide QDs embedded in ZnO layer on Pt/glass substrate were fabricated for a memory device and evaluated electrical properties after 0.2-MeV-electron beam irradiations. To formation bottom electrode, the Pt layer (200 nm) was deposited on the glass substrate by direct current sputter. The ZnO layer (100 nm) was deposited by ultra-high vacuum radio frequency sputter at base pressure $1{\times}10^{-10}$ Torr. And then, the metal-oxide QDs on the ZnO layer were created by thermal annealing. Finally, the ZnO layer (100 nm) also was deposited by ultra-high vacuum sputter. Before the formation top electrode, 0.2 MeV liner accelerated electron beams with flux of $1{\times}10^{13}$ and $10^{14}$ electrons/$cm^2$ were irradiated. We will discuss the electrical properties and the physical relationships among the irradiation condition, the dislocation density and mechanism of resistive switching in the hybrid memory device.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
• /
• pp.396-396
• /
• 2012

$TiO_2$ anatase nanotube arrays (NTAs) were grown by electrochemical anodization and followed annealing of Ti foil. Ethylene glycol/$NH_4F$-based organic electrolyte was used for electrolyte solution and using second anodization process to obtain free-standing NTAs. After obtaining NTAs, ITO film was deposited by sputtering process on bottom of NTAs. UV-curable NOA was used for attach free-standing NTAs on flexible plastic substrate (PEN). Solid state electrolyte (spiro-OMeTAD) was coated via spin-coating method on top of attached NTAs. Ag was deposited as a counter electrode. Under AM 1.5 simulated sunlight, optical characteristics of devices were investigated. In order to use flexible polymer substrate, processes have to be conducted at low temperature. In case of $TiO_2$ nano particles (NPs), however, crystallization of NPs at high temperature above $450^{\circ}C$ is required. Because NTAs were conducted high temperature annealing process before NTAs transfer to PEN, it is favorable for using PEN as flexible substrate. Fabricated flexible solid-state DSSCs make possible the preventing of liquid electrolyte corrosion and leakage, various application.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2011년도 제40회 동계학술대회 초록집
• /
• pp.288-289
• /
• 2011

Indium Tin Oxide (ITO) is a typical highly Transparent Conductive Oxide (TCO) currently used as a transparent electrode material. Most widely used deposition method is the sputtering process for ITO film deposition because it has a high deposition rate, allows accurate control of the film thickness and easy deposition process and high electrical/optical properties. However, to apply high quality ITO thin film in a flexible microelectronic device using a plastic substrate, conventional DC magnetron sputtering (DMS) processed ITO thin film is not suitable because it needs a high temperature thermal annealing process to obtain high optical transmittance and low resistivity, while the generally plastic substrates has low glass transition temperatures. In the room temperature sputtering process, the electrical property degradation of ITO thin film is caused by negative oxygen ions effect. This high energy negative oxygen ions(about over 100eV) can be critical physical bombardment damages against the formation of the ITO thin film, and this damage does not recover in the room temperature process that does not offer thermal annealing. Hence new ITO deposition process that can provide the high electrical/optical properties of the ITO film at room temperature is needed. To solve these limitations we develop the Magnetic Field Shielded Sputtering (MFSS) system. The MFSS is based on DMS and it has the plasma limiter, which compose the permanent magnet array (Fig.1). During the ITO thin film deposition in the MFSS process, the electrons in the plasma are trapped by the magnetic field at the plasma limiters. The plasma limiter, which has a negative potential in the MFSS process, prevents to the damage by negative oxygen ions bombardment, and increases the heat(-) up effect by the Ar ions in the bulk plasma. Fig. 2. shows the electrical properties of the MFSS ITO thin film and DMS ITO thin film at room temperature. With the increase of the sputtering pressure, the resistivity of DMS ITO increases. On the other hand, the resistivity of the MFSS ITO slightly increases and becomes lower than that of the DMS ITO at all sputtering pressures. The lowest resistivity of the DMS ITO is $1.0{\times}10-3{\Omega}{\cdot}cm$ and that of the MFSS ITO is $4.5{\times}10-4{\Omega}{\cdot}cm$. This resistivity difference is caused by the carrier mobility. The carrier mobility of the MFSS ITO is 40 $cm^2/V{\cdot}s$, which is significantly higher than that of the DMS ITO (10 $cm^2/V{\cdot}s$). The low resistivity and high carrier mobility of the MFSS ITO are due to the magnetic field shielded effect. In addition, although not shown in this paper, the roughness of the MFSS ITO thin film is lower than that of the DMS ITO thin film, and TEM, XRD and XPS analysis of the MFSS ITO show the nano-crystalline structure. As a result, the MFSS process can effectively prevent to the high energy negative oxygen ions bombardment and supply activation energies by accelerating Ar ions in the plasma; therefore, high quality ITO can be deposited at room temperature.

• 대한전자공학회논문지SD
• /
• 제45권7호
• /
• pp.1-8
• /
• 2008

본 논문에서는 플라스틱 기판에 OTFT를 스위칭 소자로 사용하여 유연한 EPD 패널을 제작하였다. OTFT의 채널 폭과 길이의 비(W/L)는 EPD의 응답속도를 고려하여 15이상으로 설계를 하였다. 게이트전극은 Al, 절연층은 cross-linked PVP, 반도체층은 펜타센, 중간층은 PVA/Acryl를 사용하였다. 플라스틱 기판은 보호층 처리를 통하여 열처리 공정 시 발생하는 입자를 제거하였고, 거친 표면을 평탄화하였다. 반도체층의 크기는 게이트 전극 보다 작도록 제한하여 누설전류를 줄일 수 있었다. EPD-상판과 OTFT-하판 사이에 픽셀전극을 삽입하고 또한 OTFT-하판을 보호하기 위하여 PVA/Acryl로 구성된 중간층을 상빙하였다. 완성된 OTFT-하판에서 OTFT의 이동도는 $0.21cm^2/V.s$, 전류점멸비(Ion/Ioff)는 $10^5$ 이상의 성능을 보였다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
• /
• pp.1122-1125
• /
• 2006

The TFT performances were enhanced and stabilized by plasma oxidation of the polycrystalline Si surface prior to the plasma enhanced atomic layer deposition of $Al_2O_3$ gate dielectric film. We attribute the improvement to the formation of a high quality oxide interface layer between the gate dielectric film and the poly-Si film. The interface oxide has a predominant effect on the TFT's characteristics, and is regulated by the gap distance between the electrode and the polycrystalline Si surface.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.203-203
• /
• 2012

The SWCNTs network are formed on various plastic substrates such as poly(ethylene terephthalate) (PET), polyimide (PI) and soda lime glass using roll-to-roll printing and spray process. Selective patterning of carbon nanotubes film on transparent substrates was performed using a femtosecond laser. This process has many advantages because it is performed without chemicals and is easily applied to large-area patterning. It could also control the transparency and conductivity of CNT film by selective removal of CNTs. Furthermore, selective cutting of carbon nanotube using a femtosecond laser does not cause any phase change in the CNTs, as usually shown in focused ion beam irradiation of the CNTs. The patterned SWCNT films on transparent substrate can be used electrode layer for touch panels of flexible or flat panel display instead indium tin oxide (ITO) film.

• Current Optics and Photonics
• /
• 제1권1호
• /
• pp.45-50
• /
• 2017

Optical instruments based on polymer-dispersed liquid crystal (PDLC) have been used to inspect transparent electrodes. Generally the operating voltage of an inspection instrument using PDLC is very high, over 300 V, reducing its lifetime and reliability. The operating-voltage issue becomes more serious in the inspection of touch-screen panel (TSP) electrodes, due to the bezel structure protruding over the electrodes. We have theoretically calculated the parameters affecting the operating voltage as a function of the distance between the TSP and the PDLC, the thickness, and the dielectric constant of the sublayers when the inspection module was away from the TSP electrodes. We have experimentally verified the results, and have proposed a way to reduce the operating voltage by substituting a plastic substrate film with a hard coating layer of smaller thickness and higher dielectric constant.

• 한국인쇄학회지
• /
• 제30권3호
• /
• pp.45-56
• /
• 2012

Printing technology is accepted by appropriate technology that smart phones, tablet PC, display(LCD, OLED, etc.) precision recently in the electronics industry, the market grows, this process in the ongoing efforts to improve competitiveness through the development of innovative technologies. So printed electronics appeared by new concept. This technology development is applied on electronic components and circuits for the simplification of the production process and reduce processing costs. Low-temperature process making possible for widening, slimmer, lighter, and more flexible, plastic substrates, such as(flexible) easily by forming a thin film on a substrate has been studied. In the past, the formation of the electrode used a screen printing method. But the screen printing method is formation of fine patterns, high-speed printing, mass production is difficult. The roll-to-roll printing method as an alternative to screen printing to produce electronic devices by printing techniques that were used traditionally in the latest technology and processing techniques applied to precision control are very economical to implement fine-line printing equipment has been evaluated as. In order to function as electronic devices, especially the dozens of existing micro-level of non-dot print fine line printing is required, the line should not break at all, because according to the specifications required to fit the ink transfer conditions should be established. In this study of roll-to-roll printing conductive paste suitable for gravure offset printing by developing Ag paste for forming fine patterns to study the basic physical properties with the aim of this study were to.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
• /
• pp.344-344
• /
• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.