• Title/Summary/Keyword: Pixel level ADC

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A 8-bit Variable Gain Single-slope ADC for CMOS Image Sensor

  • Park, Soo-Yang;Son, Sang-Hee;Chung, Won-Sup
    • Journal of IKEEE
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    • v.11 no.1 s.20
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    • pp.38-45
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    • 2007
  • A new 8-bit single-slope ADC using analog RAMP generator with digitally controllable dynamic range has been proposed and simulated for column level or per-pixel CMOS image sensor application. The conversion gain of ADC can he controlled easily by using frequency divider with digitally controllable diviber ratio, coarse/fine RAMP with class-AB op-amp, resistor strings, decoder, comparator, and etc. The chip area and power consumption can be decreased by simplified analog circuits and passive components. Proposed frequency divider has been implemented and verified with 0.65um, 2-poly, 2-metal standard CMOS process. And the functional verification has been simulated and accomplished in a 0.35$\mu$m standard CMOS process.

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High-Speed CMOS Binary Image Sensor with Gate/Body-Tied PMOSFET-Type Photodetector

  • Choi, Byoung-Soo;Jo, Sung-Hyun;Bae, Myunghan;Kim, Jeongyeob;Choi, Pyung;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.23 no.5
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    • pp.332-336
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    • 2014
  • In this paper, we propose a complementary metal oxide semiconductor (CMOS) binary image sensor with a gate/body-tied (GBT) PMOSFET-type photodetector for high-speed operation. The GBT photodetector of an active pixel sensor (APS) consists of a floating gate ($n^+$-polysilicon) tied to the body (n-well) of the PMOSFET. The p-n junction photodiode that is used in a conventional APS has a good dynamic range but low photosensitivity. On the other hand, a high-gain GBT photodetector has a high level of photosensitivity but a narrow dynamic range. In addition, the pixel size of the GBT photodetector APS is less than that of the conventional photodiode APS because of its use of a PMOSFET-type photodetector, enabling increased image resolution. A CMOS binary image sensor can be designed with simple circuits, as a complex analog to digital converter (ADC) is not required for binary processing. Because of this feature, the binary image sensor has low power consumption and high speed, with the ability to switch back and forth between a binary mode and an analog mode. The proposed CMOS binary image sensor was simulated and designed using a standard CMOS $0.18{\mu}m$ process.