• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.596-601
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• 2004

In this paper, we describe a study on the influence of the frequency variation of normal vibration using an integrated tactile display. It is necessary to consider this study because we want to find a method of displaying finer texture and know that the perception of fine textures is heavily influenced by temporal variation. Our tactile display system used in this experiment can simulate the micro shapes and roughness of surface textures by individual drives of a 6x8 pin array. Two experiments are performed. The first is a psychophysical experiment on the definition and range decision of roughness, and through the experiment, we clear up the meaning of roughness. The second is the main experiment about the frequency variation of normal vibration. We find the correlation between the vibration frequency and the texture and the condition for better display and perception of fine surfaces. The experimental results yielded two pieces of information. One is that lateral movement affects texture discrimination, and another is that normal vibration can make the perceived texture feel finer than real texture. That is, the vibrating stimulus is more effective for displaying a fine surface than static pressure, and it makes possible to display finer texture, exceeding the physical limit of the device.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.6
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• pp.18-26
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• 1999

This paper presents the architecture and design of a DSSS MODEM ASIC chip for wireless local area networks (WLAN). The implemented MODEM chip supports the DSSS physical layer specifications of the IEEE 802.11. The chip consits of a transmitter and a receiver which contain a CRC encoder/decoder, a differential encoder/decoder, a frequency offset compensator and a timing recovery circuit. The chip supports various data rates, i.e., 4,2 and 1Mbps and provides both DBPSK and DQPSK for data modulation. We have performed logic synthesis using the $SAMSUNG^{TM}$ $0.6{\mu}m$ gate array library and the implemented chip consists of 53,355 gates. The MODEM chip operates at 44MHz, the package type is 100-pin QFP and the power consumption is 1.2watt at 44MHz. The implemented MODEM architecture shows lower BER compared with the Harris HSP3824.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.5 s.120
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• pp.563-568
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• 2007

In this paper, the proposed package antenna, which is meander line structure with short pin, is miniaturized to realize RF-SoP at 900 MHz RFID band. The RFID BGA(Ball Grid Array) chip is put in a cavity of LTCC Layers. The coupling and cross talk, which are happen between BGA chip and proposed package antenna, are reduced by faraday cage, which consists of ground and via fences, is realized to enhance the isolation between BGA chip and antenna. The proposed antenna structure is focused on the package level antenna realization at low frequency band. The novel proposed package antenna size is $13mm{\times}9mm{\times}3.51mm$. The measured resonance frequency is 0.893 GHz. The impedance bandwidth is 9 MHz. The maximum gain of radiation pattern is -2.36 dBi.

• Journal of Welding and Joining
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• v.17 no.3
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• pp.90-95
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• 1999

The increase in high speed, multi-function and high I/O pin semiconductor devices highly demands high pin count, very thin, and high density packages. BGA is one of the solutions, but the package has demerits in package reliability, surface mounting problems due to the PCB warpage and solder joint crack related with TCE mismatch between the materials. On this study to verify the thermal fatigue lifetime of the solder joint FEM and experiments were performed after surface mounting BGA with different solder composition and reliability conditions. FEM showed optimum composition of Ag3.2-Sn96.5 and under the composition minimum creep deformation of the solder joint was calculated, and the thermal fatigue lifetime was improved. In view of temperature cycle condition, the conditions of $-65^{\circ}C$to $150^{\circ}C$ showed minimum lifetime and t was 1/3 of $0^{\circ}C$ to $125^{\circ}C$ condition. Test board was prepared and solder joint crack was verified. Until 1000cycle on soder joint crack was observed.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.12
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• pp.1875-1882
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• 2013

Micro-array technology contributes numerous achievements such as ordering of gene network and integration of genomic. This technology is well established as means for investigating patterns of gene expression. DNA micro-arrays utilize Affymetric chips where a large quantity of DNA sequences may be synthesized. There are two general type of conventional DNA array spotter: contact and piezoelectric. The contact technology used spotting pin technology to make contact with the glass slide surface. This may caused damage or scratches to the surface matrix where protein will be contaminated and may not bind specifically. Piezoelectric technology available at this present time on the other hand requires the analyzer to print the result that can only be done within the laboratory despite of mass production. Therefore, in this paper, high-throughput technology is developed for providing greater consistency in feature spot without touching the glass slide surface.

• Design & Manufacturing
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• v.10 no.1
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• pp.36-40
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• 2016

Connectors transmit electric signals to different parts in compact mobile display products. As products that apply this have become lightweight and smaller in size, there are growing demands for smaller and more integrated connectors, which are internal parts of the products. As a measure to address these demands, there is the planar array connector that minimizes the part by arranging the single-direction BTB connectors to two directions. As connectors become smaller in size and more highly integrated, maintaining intensity to prevent defects during impact and maintaining adhesive force to smoothly transmit electric signals are growing in importance. Thus, in order to identify the impact of concave shaping on improving adhesive power in connector terminal pins as a method to increase the connecting power of planar array connector terminal pins, this study predicted and examined the concave shaping method, number of concave shapes, and the adhesive power according to the size of the concave shape through CAE. For concave shaping, the model that added concave shaping towards the lower part of the connector terminal pin and added spokes for the area pressed down by the concave shaping was 0.74 N, showing increased adhesive force compared to existing models. Furthermore, when applying two concave shaping, rather than just one, there was a tendency for adhesive force to increase. In the case of adhesive power trends according to the size of the concave shaping, adhesive power increased and the width of the concave shape decreased, and the biggest adhesive force trends were shown when the concave shaping depth was 0.01mm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.32-32
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• 2008

X-ray detector는 의료용, 산업용 등 다양한 분야에서 사용되어지고 있으며 기존의 Analog X-ray 방식의 환경오염, 저장공간 부족, 실시간 분석의 어려움 등의 문제점들을 해결하기 위하여 Digital X-ray로의 전환과 연구가 활발하며 이에 따른 관심도 높아지고 있는 살점이다. Digital X-ray detector는 p-영역과 n-영역 사이에 아무런 불순물을 도핑하지 않은 진성반도체(intrinsic semiconductor) 층을 접합시킨 이종접합 PIN 구조의 photodiode 이다. 이 소자는 역바이어스를 가해주면 p영역과 n영역 사이에서 캐리어 (carrier)가 존재하지 않는 공핍 영역이 발생하게 된다. 이런 공핍 영역에서 광흡수가 일어나면, 전자-정공 쌍이 발생한다. 그리고, 발생한 전자-정공 쌍에 전압이 역방향으로 인가되는 경우, 전자는 양의 전극으로 이동하고, 정공은 음의 전극으로 이동한다. 이와 같이, 발생한 캐리어들을 검출하여 전기적인 신호로 변환 시킨다. 고해상도의 Digital X-ray detector를 만들기 위해서는 누설전류에 의한 noise 감소와 소자의 높은 안정성과 내구성을 위한 높은 breakdown voltage를 가져야 한다. 본 연구에서는 Digital X-ray detector의 leakage current 감소와 breakdown voltage를 높이기 위하여 guradring과 gettering technology를 사용하여 전기적 특성을 분석하였다. 기판으로는 $10k\Omega{\cdot}cm$ resistivity를 갖으며, n-type <111>인 1mm 두께의 4인치 Si wafer를 사용하였다. 그리고 pixel pitch는 $100{\mu}m$이며 active area는 $80{\mu}m{\times}80{\mu}m$인 $32\times32$ array를 형성하여 X-ray를 조사하여 소자의 특성을 평가 하였다.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.8 no.2
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• pp.10-17
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• 2009

Transillumination system used by radiation is widely applied to industrial imaging system. In this study, the linear detector array constructed with scintillator and pin diode, and a multi-channel data acquisition system was developed for precision inspection of end-milling. The detector module consists of $16-CdWO_4$crystal scintillator and photodiode array. The detector and data acquisition system was applied to precision inspection of end-mill and the images of the end-mill were successfully reconstructed. The total system can analyze the Detector Quantum Efficiency(DQE) of each system. The performance of developed photodiodes equipment was compared with each other for different crystal geometry and its characteristics. Finally fine details of the end-mill phantom were constructed for industrial application. The image acquired contains several objects on a real time data transfer and the linear X-ray scanning system can be applied to many fields of a industry.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.10
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• pp.186-194
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• 1996

The SliM (sliding memory plane) array processor has been proposed to alleviate disadvantages of existing mesh-connected SIMD(single instruction stream- multiple data streams) array processors, such as the inter-PE(processing element) communication overhead, the data I/O overhead and complicated interconnections. This paper presents the deisgn and implementation of SliM image processor ASIC (application specific integrated circuit) chip consisting of mesh connected 5 X 5 PE. The PE architecture implemented here is quite different from the originally proposed PE. We have performed the front-end design, such as VHDL (VHSIC hardware description language)modeling, logic synthesis and simulation, and have doen the back-end design procedure. The SliM ASIC chip used the VTI 0.8$\mu$m standard cell library (v8r4.4) has 55,255 gates and twenty-five 128 X 9 bit SRAM modules. The chip has the 326.71 X 313.24mil$^{2}$ die size and is packed using the 144 pin MQFP. The chip operates perfectly at 25 MHz and gives 625 MIPS. For performance evaluation, we developed parallel algorithms and the performance results showed improvement compared with existing image processors.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.7 s.337
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• pp.1-4
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• 2005

A four-channel photoreceiver ways have been realized in a 0.8$\mu$m Si/SiGe HBT technology for the applications of parallel optical interconnects. The receiver array includes four-channel transimpedance amplifiers (TIAs) and p-i-n photodiodes, where the TIAs exploit a common-emitter (CE) input configuration. Measured results demonstrate that the four-channel CE TIA array provides 3.9GHz bandwidth, 62dB$\Omega$ transimpedance gain, 7.5pA/sqrt(Hz) average noise current spectral density, and less than -25dB crosstalk between adjacent channels with 40mW power dissipation.