• Journal of the Korean Society for Precision Engineering
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• v.26 no.10
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• pp.47-55
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• 2009

In this study, a robot foot having toes for firm stepping on uneven surface is proposed. The toes are connected to the lower leg by parallel links so that the lower leg can rotate in the rolling and pitching directions during stance phase without ankle joint. The landing performance of the foot on uneven surface was evaluated by relative comparison with that of the most common foot making point contact with the walking surface, since the test conditions considering real uneven surface could be hardly defined for its objective evaluation. Anti-slip margin(ASM) was defined in this study to express the slip resistance of a robot foot when it lands on a projection with half circular-, triangular- or rectangular cross section, assuming that uneven surface consists of projections having these kind of cross sections in different sizes. Based on the ASM analysis, the slip conditions for the two feet were experimentally confirmed. The results showed that the slip resistance of the new foot is not only higher than that of the conventional point contact type foot but also less sensitive to the surface friction coefficient.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.129-130
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• 2007

Self servo track writing(SSTW)은 servo track writer(STW)를 이용하지 않고 hard disk drive의 내부 VCM을 이용하여 servo track을 기록하는 방식이다. SSTW는 이전 servo track을 상대적인 reference로 하여 기록하게 되므로 초기에 발생된 error와 외부의 disturbance의 영향으로 error는 급속하게 증가된다. 이것을 radial error propagation 이라 한다. 본 논문에서는 radial error propagation을 억제하기 위한 correction signal을 설계하고 servo writing 과정에서 발생하는 disturbance의 영향을 제거하기 위하여 disturbance observer(DOB)를 add-on type으로 구성하여 tracking 제어기를 설계하였다. 또한 DOB를 적용한 경우와 유사한 gain margin, phase margin과 sensitivity function을 갖는 제어기를 설계하여 그 성능을 비교하였다. 제안된 방식은 radial error propagation을 억제 하였을 뿐만 아니라 disturbance의 최소화하여 쓰여진 track의 DC track spacing과 AC track Squeeze가 개선된 것을 모의실험을 통하여 검증하였다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.1
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• pp.22-26
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• 2003

Overlap Errors and side-lobes have been simultaneously solved by the rule-based correction using the rules extracted from test patterns. Lithography process parameters affecting attPSM lithography process have been determined by the fitting method to the real process data. The correction using scattering bars has been compared to the Cr shield method. The optimal insertion rule of the scattering bal's has made it possible to suppress the side-lobes and to enhance DOF at the same time. Therefore, in this paper, the solution to both side-lobe and overlap Error has been proposed using rule-based confection. Compared to the existing Cr shield method, the proposed rule-based correction with scattering bars can reduce the process complexity and time for mask production.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.3
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• pp.517-522
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• 2004

In this paper, we have analyzed the performance enhancement of Orthogonal Frequency Division Multiplexing/Quadrature Phase Shift Keying Modulation-Digital Microwave Radio(OFDM/QPSK-DMR) system using Band Limited-Pulse Shaping Filter(BL-PSF) over microwave channel environments. For performance enhancement, the one-tap adaptive equalizer is adopted in the OFDM/QPSK-DMR system and than both BER and signature curve performance are compared with those of single carrier DMR system. Computer simulations confirm that the OFDM/QPSK-DMR system using 16 sub-carrier increase the fade margin about 2 dB over microwave channel environments and that of performance using one-tap adaptive equalizer is highly increased the fade margin as the number of sub-carriers is larger.

• Journal of IKEEE
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• v.6 no.1 s.10
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• pp.21-29
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• 2002

This paper describes a high resolution DLL(Delay Locked Loop) using all digital circuits. The proposed architecture is based on the three stage of coarse, fine and ultra fine phase tuning block which has a phase detector, selection block and delay line respectively. The first stage, the ultra fine phase tuning block, is tune to accomplish high resolution using a vernier delay line. The second and third stage, the coarse and fine tuning block, are tuning the phase margin of Unit Delay using the delay line and are similar to each other. It was simulated in 0.35um CMOS technology under 3.3V supply using HSPICE simulator. The simulation result shows the phase resolution can be down to lops with the operating range of 250MHz to 800MHz.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.482-484
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• 1995

In designing three phase enclosure type EHV class gas insulated bus (GIB), it is essential to estimate the magnitude and the position where the maximum electric field strength occur. The improvement of insulation design can only be initiated after those informations have been obtained. In this paper, the calculated electric field strength for three phase GIB of HICO 362kV 63kA GIS is presented. The result shows that the designed insulator has enough margin compared with the design criteria.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.1
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• pp.85-93
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• 2007

This paper presents new LVDS I/O circuits with a high noise margin for use in highly parallel I/O environments. The proposed LVDS I/O includes transmitter and receiver parts. The transmitter circuits consist of a differential phase splitter and a output stage with common mode feedback(CMFB). The differential phase splitter generates a pair of differential signals which have a balanced duty cycle and $180^{\circ}$ phase difference over a wide supply voltage variation due to SSO(simultaneous switching output) noises. The CMFB output stage produces the required constant output current and maintains the required VCM(common mode voltage) within ${\pm}$0.1V tolerance without external circuits in a SSO environment. The proposed receiver circuits in this paper utilizes a three-stage structure(single-ended differential amp., common source amp., output stage) to accurately receive high-speed signals. The receiver part employs a very wide common mode input range differential amplifier(VCDA). As a result, the receiver improves the immunities for the common mode noise and for the supply voltage difference, represented by Vgdp, between the transmitter and receiver sides. Also, the receiver produces a rail-to-rail, full swing output voltage with a balanced duty cycle(50% ${\pm}$ 3%) without external circuits in a SSO environment, which enables correct data recovery. The proposed LVDS I/O circuits have been designed and simulated with 0.18um TSMC library using H-SPICE.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.10
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• pp.918-922
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• 2006

Chalcogenide Phase change memory has the high performance necessary for next-generation memory, because it is a nonvolatile memory with high programming speed, low programming voltage, high sensing margin, low power consumption and long cycle duration. To minimize the power consumption and the program voltage, the new composition material which shows the better phase-change properties than conventional $Ge_2Sb_2Te_5$ device has to be needed by accurate material engineering. In the present work, we investigate the basic thermal and the electrical properties due to phase-change compared with chalcogenide-based new composition $Ge_1Se_1Te_2$ material thin film and convetional $Ge_2Sb_2Te_5$ PRAM thin film. The fabricated new composition $Ge_1Se_1Te_2$ thin film exhibited a successful switching between an amorphous and a crystalline phase by applying a 950 ns -6.2 V set pulse and a 90 ns -8.2 V reset pulse. It is expected that the new composition $Ge_1Se_1Te_2$ material thin film device will be possible to applicable to overcome the Set/Reset problem for the nonvolatile memory device element of PRAM instead of conventional $Ge_2Sb_2Te_5$ device.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6A
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• pp.583-591
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• 2008

OFDM (orthogonal frequency division multiplexing) has serious problem of high PAPR (peak-to-average power ratio). Recently, CI/OFDM (carrier interferometry OFDM) system has been proposed for the low PAPR. However, CI/OFDM system shows another problem of ICI because of phase offset mismatch due to the phase noise. In this paper, to simultaneously reduce the PAPR and ICI effects, we propose an A-CI/OFDM (advanced-CT/OFDM). This method improves the BER performance by use of the margin of phase offset at CI codes. Propose system to reduce the effect the phase noise, even though it shows a little bit higher PAPR than conventional CI/OFDM, so we apply the PTS among the PAPR reduction techniques to proposed system to mitigate this problem. Therefore, it improves the total BER performance because the proposed method can decrease the effect of phase noise and get the gain in PAPR reduction performance. From the simulation results, we can show the performance comparison between the conventional OFDM, CI/OFDM and A-CI/OFDM.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.6
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• pp.297-301
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• 2006

In the present work, we investigate the characteristics of new composition material, chalcogenide $Ge_1Se_1Te_2$ material in order to overcome the problems of conventional PRAM devices. The Tc of $Ge_1Se_1Te_2$ bulk was measured $231.503^{\circ}C$ with DSC analysis. For static DC test mode, at low voltage, two different resistances are observed. depending on the crystalline state of the phase-change resistor. In the first sweep, the as-deposited amorphous $Ge_1Se_1Te_2$ showed very high resistance. However when it reached the threshold voltage(about 11.8 V), the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The phase transition between the low conductive amorphous state and the high conductive crystal]me state was caused by the set and reset pulses respectively which fed through electrical signal. Set pulse has 4.3 V. 200 ns. then sample resistance is $80\sim100{\Omega}$. Reset pulse has 8.6 V 80 ns, then the sample resistance is $50{\sim}100K{\Omega}$. For such high resistance ratio of $R_{reset}/R_{set}$, we can expect high sensing margin reading the recorded data. We have confirmed that phase change properties of $Ge_1Se_1Te_2$ materials are closely related with the structure through the experiment of self-heating layers.