• 제목/요약/키워드: Peak interference

검색결과 191건 처리시간 0.027초

적응 디지틀 전치왜곡기를 이용한 선형화된 전력증폭기의 구현 (Implementation of a Linearized Power Amplifier using a Adaptive Digital Predistorter)

  • 류봉렬;정창규;김남수;박한규
    • 전자공학회논문지A
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    • 제31A권12호
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    • pp.9-15
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    • 1994
  • In this paper, the linearized power amplifier using digital adaptive predistorter is implemented in order to restrict spectral spreading and adjacent channel interference. The linearized systems is composed of a DSP56001 processor that executes predistortion in baseband. 90.deg. phase shifter, power splitter/combiner, quadrature modulator/demodulator of 360MHz band, and nonlinear amplifier. A ${\pi}$/4-shift QPSK is used to modulate digital random signals. As the quantized power of baseband signal and the output of amplifier are fed to the predistorter, and predistorting values are calculated using an adaptive algorithm. In the experiment, a peak to sidelobe ratio of the linearized amplifier is improved up to 15dB in comparison with conventional nonlinear amplifier, which means that the distortion of transmitted signal is decreased and adjacent channel interference was reduced.

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Swaging Autofrettage 의 해석과 원통설계 가공에의 응용

  • 손승요;김세영
    • 대한기계학회논문집
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    • 제5권4호
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    • pp.362-367
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    • 1981
  • Two categories in the design of thick cylinders are suggested and their computer programs are developed; the one termed processing design to ensure the precise inner radius of the cylinder and the other, termd stress compensation design to reduce peak stresses in the cylinder wall. The processing design seeks suitable interference by the method of linear iteration to determine either the radius of the mandrel R or the inner radius ofthe chlinder R$\sub$1/. On the other hand, the stress compensation design seeks first the suitable m and which satisfies the design criteria .sigma.$\sub$actual/ < .sigma.$\sub$allowable/ and then tries to find the suitable interference for given m and .zeta. The design program developed here may be used either in the office at the planning stage of thick chlinders as machine elements of on the processing line to get precise final dimension of inner radius.

OFDM/FH 시스템에서 위상잡음과 비선형 HPA의 특성분석 (Analysis of Phase Noise and HPA Non-linearity in the OFDM/FH Communication System)

  • 이영선
    • 한국전자파학회:학술대회논문집
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    • 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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    • pp.649-659
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    • 2003
  • OFDM/FH communication system Is widely used in the wireless communication for the large capacity and high-speed data transmission. However, phase noise and PAPR (peak-to-average power ratio) are the serious problems causing performance impairment. In this paper, PLL (phase locked loop) frequency synthesizer with high switching speed is used for the phase noise model. SSPA and TWTA are considered for the nonlinear HPA model. Under these conditions and by approximating $e^{j{\phi}[m]}$ into $1 + j{\phi}[m]-\frac{1}{2}{\phi}^2[m]$ for the phase noise nonlinear approximation, SINR (signal-to-interference-noise-ratio) with nonlinear HPA and phase noise is derived in the OFDM/FH system. The bit error probabilities (BER) are found by computer simulation method and semi-analytical method. The simulation results closely match with the semi-analytical results.

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Attenuation of Background Molecular Ions and Determination of Isotope Ratios by Inductively Coupled Plasma Mass Spectrometry at Cool Plasma Condition

  • 박창준
    • Bulletin of the Korean Chemical Society
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    • 제18권7호
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    • pp.706-710
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    • 1997
  • Isotope ratios of K, Ca, Cr and Fe are measured at cool plasma condition generated using high carrier flow rate and relatively low RF power of 900 W. Background molecular ions are suppressed to below 100 counts which give isobaric interference to the analytes. The background ions show different attenuation characteristics at increased carrier flow rate and hence for each element different carrier flow rate should be used to measure isotope ratios without isobaric interference. Isotope ratios are measured at both scan and peak-hopping modes and compared with certified or accepted ratios. The measured isotope ratios show some mass discrimination against low mass due to low ion energy induced from a copper shield to eliminate capacitive coupling of plasma with load coil.

히스토그램 기반 코드 영역 보상 기법을 적용한 W-CDMA 기지국용 CFR 알고리즘 (A Novel CFR Algorithm using Histogram-based Code Domain Compensation Process for WCDMA Basestation)

  • 장형민;이원철
    • 한국통신학회논문지
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    • 제32권12C호
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    • pp.1175-1187
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    • 2007
  • 이동통신 기지국 시스템에서 송신 신호의 PAR 성능을 (peak-to-average power ratio) 개선함으로써 범용 전력 증폭기의 사용이 가능하게 되며, 이로 인해 전체적인 기지국 비용의 절감을 기대할 수 있다. 일반적으로 PAR 값을 줄임으로 인해 기지국 송신신호의 인근 대역 간섭 제한 성능을 나타내는 ACLR이나 (adjacent channel leakage ratio) 품질을 나타내는 EVM이나 (error vector magnitude) PCDE 성능의 (peak code domain error) 열화를 발생시킨다. 본 논문에서 이러한 문제점을 해결하기 위하여 필터링 기반의 CFR 방식인 (crest factor reduction) FDCFR 알고리즘을 (filter-dependent CFR) 소개하며, 히스토그램 기반 코드 영역 보상(HBWCDC; histogram based waterfilling code domain compensation)기법을 제안한다. 본 논문에서 제안한 CFR 알고리즘은 PAR 감소뿐만 아니라 앞서 언급한 ACLR, EVM 및 PCDE등의 성능 열화를 방지한다.

A Spread Spectrum Clock Generator for SATA II with Rounded Hershey-Kiss Modulation Profile

  • Moon, Yong-Hwan;Lim, Wan-Sik;Kim, Tae-Ho;Kang, Jin-Ku
    • 전기전자학회논문지
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    • 제15권2호
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    • pp.129-133
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    • 2011
  • A spread spectrum clock generation is an efficient way to reduce electro-magnetic interference (EMI) radiation in modern mixed signal chip systems. The proposed circuit generates the spread spectrum clock by directly injecting the modulation voltage into the voltage-controlled oscillator (VCO) current source for SATA II. The resulting 33KHz modulation profile has a Hersey-Kiss shape with a rounded peak. The chip has been fabricated using $0.18{\mu}m$ CMOS process and test results show that the proposed circuit achieves 0.509% (5090ppm) down spreading at 1.5GHz and peak power reduction of 10dB. The active chip area is 0.36mm ${\times}$ 0.49mm and the chip consumes 30mW power at 1.5GHz.

Design Methodologies for Reliable Clock Networks

  • Joo, Deokjin;Kang, Minseok;Kim, Taewhan
    • Journal of Computing Science and Engineering
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    • 제6권4호
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    • pp.257-266
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    • 2012
  • This paper overviews clock design problems related to the circuit reliability in deep submicron design technology. The topics include the clock polarity assignment problem for reducing peak power/ground noise, clock mesh network design problem for tolerating clock delay variation, electromagnetic interference aware clock optimization problem, adjustable delay buffer allocation and assignment problem to support multiple voltage mode designs, and the state encoding problem for reducing peak current in sequential elements. The last topic belongs to finite state machine (FSM) design and is not directly related to the clock design, but it can be viewed that reducing noise at the sequential elements driven by clock signal is contained in the spectrum of reliable circuit design from the clock source down to sequential elements.

공간변조 기법을 위한 새로운 PAPR 감쇄 방법 (New PAPR Reduction Method for Spatial Modulation)

  • 샹위롱;김호준;김홍중;정태진
    • 한국통신학회논문지
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    • 제39A권1호
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    • pp.12-18
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    • 2014
  • In this paper, a new peak-to-average power ratio (PAPR) reduction method for spatial modulation(SM) is presented. By using the matrix with all non-zero elements to precode the signals before transmitting, the transmit power is scattered over all transmit antennas for achieving the goal of PAPR reduction. If this matrix is also an unitary matrix, the distribution of transmit power over transmit antennas will be uniform and it also could retain the characteristic of avoiding inter channel interference (ICI) due to the orthogonality of unitary matrix. In case of a non-ideal amplifier, the proposed method can produce a considerable improvement that increases with a number of transmit antennas in performance. Furthermore, the new scheme achieves an identical performance with conventional one in the case of ideal amplifier.

다상 DC-DC 컨버터의 입력 전류 리플 저감 제어 알고리즘 (Input Current Ripple Reduction Algorithm for Interleaved DC-DC Converter)

  • 주동명;김동희;이병국
    • 전력전자학회논문지
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    • 제19권3호
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    • pp.220-226
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    • 2014
  • Input current ripple and harmonic components of the power device are main causes of electromagnetic interference (EMI). Although the discontinuous conduction mode (DCM) operation can reduce harmonic components of the power device by reducing reverse recovery current of diode and turn-off voltage spikes of the switch, input current ripple increases due to high peak to peak inductor current. Therefore, in this paper, frequency control algorithm is proposed to reduce the input current ripple of DCM operated interleaved boost converter. In the proposed algorithm, duty ratio is fixed either 0.33 or 0.67 to minimize the input current ripple and the switching frequency is controlled according to operating conditions. 600 W 3-phase interleaved boost converter prototype system is built to verify proposed algorithm.

붕소가 도핑된 다이아몬드 전극을 이용한 생체화학물질의 검출 (Detection of Bio-chemical by Boron-doped Diamond Electrode)

  • 이은주;등도소;박수길
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 추계학술대회 논문집 전기물성,응용부문
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    • pp.167-169
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    • 2002
  • Selective, highly stable determination of serotonin was achieved in cyclic voltammetric measurement carried out at electrochemically treated conductive boron-doped diamond electrode. Boron-doped diamond electrodes were prepared on single crystal Si wafers by microwave plasma chemical vapor deposition and $B_2O_3$ was dissolved in acetone/methanol(9:1) mixture solution so that the B/C weight ratio ca. $10^4ppm$. Serotonin is a kind of indoleamines, which secreted from adrenal marrow cells. The serious problem to detection of serotonin is the interference phenomena of electroactive constituent, including AA. In this study, electrochemical treatment of HDD was carried out to discriminate between serotonin and AA responses. Experimental results showed that the peak potential of AA oxidation shift to the positive direction and the oxidation peak of serotonin was unchanged.

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