• Title/Summary/Keyword: Parity

Search Result 1,098, Processing Time 0.026 seconds

A Study on a concatenated RS code and Turbo code for OFDM system over burst noise channel

  • Choi Sang Min;Moon Byung Hyun;Park Jong Soo
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2004년도 학술대회지
    • /
    • pp.649-652
    • /
    • 2004
  • In this paper, a concatenated RS and Turbo code is proposed for OFDM system over burst error channel. The concatenated code used in this study is a RS(255,2D2) code and a rate 1/2 turbo code. The turbo code uses 2 recursive systematic convolutional (RSC) code as the constituent codes and the parity bit are punctured to get the desired code rate. It is shown by simulation that the conventional OFDM system fails when there exists burst noise. The concatenated RS and turbo code obtains at least 5dB gain over the turbo code at the bit error probability of $10^{-3}$.

  • PDF

역전파 신경회로망의 수렴속도 개선을 위한 학습파라메타 설정에 관한 연구 (On the configuration of learning parameter to enhance convergence speed of back propagation neural network)

  • 홍봉화;이승주;조원경
    • 전자공학회논문지B
    • /
    • 제33B권11호
    • /
    • pp.159-166
    • /
    • 1996
  • In this paper, the method for improving the speed of convergence and learning rate of back propagation algorithms is proposed which update the learning rate parameter and momentum term for each weight by generated error, changely the output layer of neural network generates a high value in the case that output value is far from the desired values, and genrates a low value in the opposite case this method decreases the iteration number and is able to learning effectively. The effectiveness of proposed method is verified through the simulation of X-OR and 3-parity problem.

  • PDF

출력분기가 있는 조합논리회로의 고장검출에 과한 연구 (A Study on the Fault Detection in combinational Logic Networks with Fan-out)

  • 임재탁;이근영
    • 대한전자공학회논문지
    • /
    • 제11권4호
    • /
    • pp.12-18
    • /
    • 1974
  • 본 논문은 출력분준가 있는 조합논리회로의 최소 고장검출실험의 생성에 관한 것이다. 조합논리회로의 출력분준선에 있어서의 신청반전의 우기성을 고려함으로서 출력분준가 있는 회로에 대한 특성그래프와 그 부분그래프를 작성하여 필요한 테스트수의 하한과 그 최소실험을 구하였다. 출력분준선의 고장검출 가능가부를 판정하는데 Boolean Difference를 이용하였다.

  • PDF

Regional Relative Price Disparities and Their Driving Forces

  • Chang, Eu Joon;Kim, Young Se
    • East Asian Economic Review
    • /
    • 제21권3호
    • /
    • pp.201-230
    • /
    • 2017
  • This paper studies the long-run behavior of relative price dispersion among cities in Korea with a special emphasis on heterogeneous transitional patterns of price level dynamics. Formal statistical tests indicate considerable evidence for rejecting the null of relative price level convergence among the majority of cities over the sample period of 1985-2015. The analysis of gravity model suggests that the effect of transportation costs on intercity price level differentials is limited, while other socioeconomic factors, such as income, input factor prices, demographic structure, and housing price growth, play key roles in accounting for persistent regional price level disparities. Individual price levels are found to be better explained by a multiple-component model, and the deviations from PPP may be attributed to distinct stochastic common trends that are characterized by income and demographic structure.

LDPC Decoding by Failed Check Nodes for Serial Concatenated Code

  • Yu, Seog Kun;Joo, Eon Kyeong
    • ETRI Journal
    • /
    • 제37권1호
    • /
    • pp.54-60
    • /
    • 2015
  • The use of serial concatenated codes is an effective technique for alleviating the error floor phenomenon of low-density parity-check (LDPC) codes. An enhanced sum-product algorithm (SPA) for LDPC codes, which is suitable for serial concatenated codes, is proposed in this paper. The proposed algorithm minimizes the number of errors by using the failed check nodes (FCNs) in LDPC decoding. Hence, the error-correcting capability of the serial concatenated code can be improved. The number of FCNs is simply obtained by the syndrome test, which is performed during the SPA. Hence, the decoding procedure of the proposed algorithm is similar to that of the conventional algorithm. The error performance of the proposed algorithm is analyzed and compared with that of the conventional algorithm. As a result, a gain of 1.4 dB can be obtained by the proposed algorithm at a bit error rate of $10^{-8}$. In addition, the error performance of the proposed algorithm with just 30 iterations is shown to be superior to that of the conventional algorithm with 100 iterations.

국내외 자본시장 통합도 분석

  • 김준일
    • KDI Journal of Economic Policy
    • /
    • 제22권1_2호
    • /
    • pp.363-417
    • /
    • 2000
  • 우리 경제는 외환위기를 계기로 단기금융시장을 포함한 국내 자본시장이 전면 개방된 동시에 외환거래 역시 대폭 자유화됨에 따라 실물부문은 물론 금융부문에 있어서도 완전한 개방경제체제로 전환하였다. 이러한 전면적인 자본시장 개방은 국내외 자본시장의 통합을 촉진하는 동시에 환율, 금리, 물가 등 거시 금융변수간의 상충관계(trade-off)에 변화를 초래함으로써 거시경제정책 환경도 크게 변호시킬 것으로 기대된다. 본고에서는 국내외 금리 및 주가간의 동조화 현상에 초점을 맞추어 자본시장 개방에 따른 국내외 자본시장 통합 효과를 살펴본 후, 자본시장 개방이 환율변동패턴의 통계적 특성에 어떠한 영향을 미쳤는지를 분석하였다. 특히 외환위기를 계기로 국내 자본시장이 제도적으로 완전 개방된 점을 고려하여 위기 이전과 이후에 자본시장 통합도와 환율 변동패턴에 어떠한 변화가 발생하였는지를 실증분석하였다. 금리에 대한 실증분석 결과는 외환위기 이후 금리재정거래(金利裁定去來)(interest parity)가 국내금리변화에 미치는 영향이 크게 확대되고 있음을 나타내고 있다. 주가에 대한 실증분석의 경우에도 미국과 국내주가 간의 동조화 현상이 외환위기 이후 심화되고 있으며, 국내 주식시장이 효율적 시장가설(efficient market hypothesis)을 지지하는 방향으로 변화하고 있음을 나타내고 있다. 환율의 경우에도 외환위기 이후 환율변동패턴에 임의보행(random walk)적 특성이 보다 강화된 것으로 나타나고 있어 외환시장의 효율성이 제고되었음을 시사하고 있다.

  • PDF

LDPC 부호를 위한 복잡도와 대기시간을 낮춘 VCRBP 알고리즘 (Reduced Complexity-and-Latency Variable-to-Check Residual Belief Propagation for LDPC Codes)

  • 김정현;송홍엽
    • 한국통신학회논문지
    • /
    • 제34권6C호
    • /
    • pp.571-577
    • /
    • 2009
  • 본 논문에서는, LDPC 부호를 위한 node-wise VCRBP의 개선된 기법인, 강제수렴 node-wise VCRBP와 부호기반 node-wise VCRBP를 제안한다. 두 가지 기법 모두 node-wise VCRBP에 비하여 매우 적은 오류 정정 성능 열화만으로 복호 복잡도와 대기시간을 현저하게 줄인다.

A Neural Fuzzy Learning Algorithm Using Neuron Structure

  • Yang, Hwang-Kyu;Kim, Kwang-Baek;Seo, Chang-Jin;Cha, Eui-Young
    • 한국지능시스템학회:학술대회논문집
    • /
    • 한국퍼지및지능시스템학회 1998년도 The Third Asian Fuzzy Systems Symposium
    • /
    • pp.395-398
    • /
    • 1998
  • In this paper, a method for the improvement of learning speed and convergence rate was proposed applied it to physiological neural structure with the advantages of artificial neural networks and fuzzy theory to physiological neuron structure, To compare the proposed method with conventional the single layer perception algorithm, we applied these algorithms bit parity problem and pattern recognition containing noise. The simulation result indicated that our learning algorithm reduces the possibility of local minima more than the conventional single layer perception does. Furthermore we show that our learning algorithm guarantees the convergence.

  • PDF

A New Fuzzy Supervised Learning Algorithm

  • Kim, Kwang-Baek;Yuk, Chang-Keun;Cha, Eui-Young
    • 한국지능시스템학회:학술대회논문집
    • /
    • 한국퍼지및지능시스템학회 1998년도 The Third Asian Fuzzy Systems Symposium
    • /
    • pp.399-403
    • /
    • 1998
  • In this paper, we proposed a new fuzzy supervised learning algorithm. We construct, and train, a new type fuzzy neural net to model the linear activation function. Properties of our fuzzy neural net include : (1) a proposed linear activation function ; and (2) a modified delta rule for learning algorithm. We applied this proposed learning algorithm to exclusive OR,3 bit parity using benchmark in neural network and pattern recognition problems, a kind of image recognition.

  • PDF

Lowering Error Floor of LDPC Codes Using an Improved Parallel WBF Algorithm

  • Ma, Kexiang;Li, Yongzhao;Zhu, Caizhi;Zhang, Hailin;Zhang, Yuming
    • ETRI Journal
    • /
    • 제36권1호
    • /
    • pp.171-174
    • /
    • 2014
  • In weighted bit-flipping-based algorithms for low-density parity-check (LDPC) codes, due to the existence of overconfident incorrectly received bits, the metric values of the corresponding bits will always be wrong in the decoding process. Since these bits cannot be flipped, decoding failure results. To solve this problem, an improved parallel weighted bit flipping algorithm is proposed. Specifically, a reliability-saturation strategy is adopted to increase the flipping probability of the overconfident incorrectly received bits. Simulation results show that the error floor of LDPC codes is greatly lowered.