• Title/Summary/Keyword: Parity

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A Design Method of Multi-Rate Low Density Parity Check Code (다수의 코드율이 가능한 저밀도 패러티 체크 코드의 설계 방법)

  • Hwang, Sung-Hee;Kim, Jin-Han;Park, Hyun-Soo
    • Transactions of the Society of Information Storage Systems
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    • v.3 no.3
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    • pp.126-128
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    • 2007
  • 일반적으로 주어진 하나의 H matrix 로 다수의 코드율을 가지는 코드화가 가능하다. 하지만 Low Density Parity Check(LDPC) 코드의 H matrix는 H matrix 내의 1의 개수와 위치에 따라 그 성능이 달라짐으로 해서 하나의 H matrix로 다수의 코드율을 대응하기 위한 설계 방법이 요구된다. H matrix 의 성능은 일반적으로 girth나 minimum distance에 의해 좌우되고 H matrix의 1의 위치에 따라 달라진다. 본 논문에서는 H matrix의 girth 와 minimum distance에 입각한 다수 개의 코드율이 대응 가능한 LDPC code의 H matrix 설계 방법을 제시하고자 한다. 이렇게 함으로써 하나의 H matrix로 다수의 코드율에 따른 각각의 성능을 일정 수준 이상 유지하는 multi-rate LDPC code가 가능하다.

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Enhanced Upper Bound for Erasure Recovery in SPC Product Codes

  • Muqaibel, Ali
    • ETRI Journal
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    • v.31 no.5
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    • pp.518-524
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    • 2009
  • Single parity check (SPC) product codes are simple yet powerful codes that are used to correct errors and/or recover erasures. The focus of this paper is to evaluate the performance of such codes under erasure scenarios and to develop a closed-form tight upper bound for the post-decoding erasure rate. Closed-form exact expressions are derived for up to seven erasures. Previously published closed-form bounds assumed that all unrecoverable patterns should contain four erasures in a square. Additional non-square patterns are accounted for in the proposed expressions. The derived expressions are verified using exhaustive search. Eight or more erasures are accounted for by using a bound. The developed expressions improve the evaluation of the recoverability of SPC product codes without the need for simulation or search algorithms, whether exhaustive or novel.

Effects of LDPC Code on the BER Performance of MPSK System with Imperfect Receiver Components over Rician Channels

  • Djordjevic, Goran T.;Djordjevic, Ivan B.;Ivanis, Predrag N.
    • ETRI Journal
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    • v.31 no.5
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    • pp.619-621
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    • 2009
  • In this letter, we study the influence of receiver imperfections on bit error rate (BER) degradations in detecting low-density parity-check coded multilevel phase-shift keying signals transmitted over a Rician fading channel. Based on the analytical system model which we previously developed using Monte Carlo simulations, we determine the BER degradations caused by the simultaneous influences of stochastic phase error, quadrature error, in-phase-quadrature mismatch, and the fading severity.

Optimal residual generation using parity space approach for a position servo system (패리티 공간기법을 이용한 위치 서보계의 최적 잔차 발생)

  • 최경영;박태건;이기상
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.1440-1443
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    • 1997
  • The optimal residual generator based on parity relation approach for the fault detection and isolation of a arge diesel engine actuator position servo system is presented. The closed-loop residual generator is designed to have robustness against modeling errors and noise. Main purpose of the fault detection and isolation system in the process is to detect and isolate two important faults, i.e., actuatro fault and fault of speed sensor, that, if not detected and compensated, degrade the overall control system performance. Simulation results are give to show the practical applicability of the fault detecrtion and isloation scherme.

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Low Density Codes Construction using Jacket Matrices (잰킷 행렬을 이용한 저밀도 부호의 구성)

  • Moon Myung-Ryong;Jia Hou;Hwang Gi-Yean;Lee Moon-Ho;Lee Kwang-Jae
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.8 s.338
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    • pp.1-10
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    • 2005
  • In this paper, the explicit low density codes construction from the generalized permutation matrices related to algebra theory is investigated, and we design several Jacket inverse block matrices on the recursive formula and permutation matrices. The results show that the proposed scheme is a simple and fast way to obtain the low density codes, and we also Proved that the structured low density parity check (LDPC) codes, such as the $\pi-rotation$ LDPC codes are the low density Jacket inverse block matrices too.

A Variable Rate LDPC Coded V-BLAST System (가변 부호화 율을 가지는 LDPC 부호화된 V-BLAST 시스템)

  • Noh, Min-Seok;Kim, Nam-Sik;Park, Hyun-Cheol
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.55-58
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    • 2004
  • This this paper, we propose vertical Bell laboratories layered space time (V-BLAST) system based on variable rate Low-Density Parity Check (LDPC) codes to improve performance of receiver when QR decomposition interference suppression combined with interference cancellation is used over independent Rayleigh fading channel. The different rate LDPC codes can be made by puncturing some rows of a given parity check matrix. This allows to implement a single encoder and decoder for different rate LDPC codes. The performance can be improved by assigning stronger LDPC codes in lower layer than upper layer because the poor SNR of first detected data streams makes error propagation. Keeping the same overall code rates, the V-BLAST system with different rate LDPC codes has the better performance (in terms of Bit Error Rate) than with constant rate LDPC code in fast fading channel.

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Efficient Parallel Block-layered Nonbinary Quasi-cyclic Low-density Parity-check Decoding on a GPU

  • Thi, Huyen Pham;Lee, Hanho
    • IEIE Transactions on Smart Processing and Computing
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    • v.6 no.3
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    • pp.210-219
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    • 2017
  • This paper proposes a modified min-max algorithm (MMMA) for nonbinary quasi-cyclic low-density parity-check (NB-QC-LDPC) codes and an efficient parallel block-layered decoder architecture corresponding to the algorithm on a graphics processing unit (GPU) platform. The algorithm removes multiplications over the Galois field (GF) in the merger step to reduce decoding latency without any performance loss. The decoding implementation on a GPU for NB-QC-LDPC codes achieves improvements in both flexibility and scalability. To perform the decoding on the GPU, data and memory structures suitable for parallel computing are designed. The implementation results for NB-QC-LDPC codes over GF(32) and GF(64) demonstrate that the parallel block-layered decoding on a GPU accelerates the decoding process to provide a faster decoding runtime, and obtains a higher coding gain under a low $10^{-10}$ bit error rate and low $10^{-7}$ frame error rate, compared to existing methods.

A Fault Detection Method of Redundant IMU Using Modified Principal Component Analysis

  • Lee, Won-Hee;Park, Chan-Gook
    • International Journal of Aeronautical and Space Sciences
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    • v.13 no.3
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    • pp.398-404
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    • 2012
  • A fault detection process is necessary for high integrity systems like satellites, missiles and aircrafts. Especially, the satellite has to be expected to detect faults autonomously because it cannot be fixed by an expert in the space. Faults can cause critical errors to the entire system and the satellite does not have sufficient computation power to operate a large scale fault management system. Thus, a fault detection method, which has less computational burden, is required. In this paper, we proposed a modified PCA (Principal Component Analysis) as a powerful fault detection method of redundant IMU (Inertial Measurement Unit). The proposed method combines PCA with the parity space approach and it is much more efficient than the others. The proposed fault detection algorithm, modified PCA, is shown to outperform fault detection through a simulation example.

A Robust Method of Fault Diagnosis for Steer-by-Wire System's Sensor (Steer-by-Wire 시스템의 감지기에 대한 강인한 이상진단기법)

  • Moon S.W.;Ji Y.K.;Huh K.S.;Cho D.I.;Park J.H.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.1463-1467
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    • 2005
  • This paper proposes an analytical redundancy technique for fault diagnostics of the sensor in steer-by-wire system. We use incorporating vehicle dynamics modeling into the design of a diagnostic system for steer-by-wire system. The use of a model of vehicle dynamics improves the speed and accuracy of the diagnoses. The proposed fault diagnostics algorithm is based on parity-space methods to generate residuals. To reduce the effects of modeling uncertainty and dynamic transients, the residuals are subject to filtering. We construct diagnostic system consisting residual threshold for detection and isolator with using the directional residual vector.

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Design of Non-Binary Quasi-Cyclic LDPC Codes Based on Multiplicative Groups and Euclidean Geometries

  • Jiang, Xueqin;Lee, Moon-Ho
    • Journal of Communications and Networks
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    • v.12 no.5
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    • pp.406-410
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    • 2010
  • This paper presents an approach to the construction of non-binary quasi-cyclic (QC) low-density parity-check (LDPC) codes based on multiplicative groups over one Galois field GF(q) and Euclidean geometries over another Galois field GF($2^S$). Codes of this class are shown to be regular with girth $6{\leq}g{\leq}18$ and have low densities. Finally, simulation results show that the proposed codes perform very wel with the iterative decoding.