• Transactions of the Korean Society of Automotive Engineers
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• v.17 no.2
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• pp.1-9
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• 2009

A parking-assist system is defined that a driver adjusts vehicle velocity through brake pedal operation and parking-assist system controls the motion of the vehicle to follow a collision-free path. In this study, a motion control algorithm using Fuzzy inference is proposed to track a maneuvering clothoid parallel path. Simulations are performed under SIMULINK environments using MATLAB and CarSim for a vehicle model. As the vehicle model in MATLAB a bicycle model is used including lateral dynamics. The simulation results show that the path tracking performance is satisfactory under various driving and initial conditions.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.771-774
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• 1998

In this paper proposes a new bit-parallel structure for a multiplier over GF((Pn)m), with k-nm. Mastrovito Multiplier, Karatsuba-ofman algorithm are applied to the multiplication of polynomials over GF(2n). This operation has a complexity of order O(k log p3) under certain constrains regardig k. A complete set of primitive field polynomials for composite fields is provided which perform modulo reduction with low complexity. As a result, multiplier for fields GF(Pk) with low gate counts and low delays are constructed. The architectures are highly modular and thus well suited for VLSI implementation.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.333-336
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• 1999

In this paper, a new high speed parallel input and parallel output GF(2$^{m}$ ) multiplier based on standard basis is proposed. The concept of the multiplication in standard basis coordinates gives an easier VLSI implementation than that of the dual basis. This proposed algorithm and method of implementation of the GF(2$^{m}$ ) multiplication are represented by two kinds of basic cells (which are the generalized and fixed basic cell), and the minimum critical path with pipelined operation. In the case of the generalized basic cell, the proposed multiplier is composed of $m^2$ basic cells where each cell has 2 two input AND gates, 2 two input XOR gates, and 2 one bit latches Specifically, we show that the proposed multiplier has smaller complexity than those proposed in 〔5〕.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.9-11
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• 2018

This paper studies on the development of an electric fire prevention system with the detection and alarm in case of parallel arc fault occurrence in low voltage distribution lines. The proposed detector has the characteristics of high speed operation responsibility and superior system reliability from composition using a large number of semiconductor devices. The line voltage is always feedback, and when an arc or a spark occurs, these are detected by the microcomputer. In addition, we design and develop algorithms using high speed and high precision microcomputer. A new conceptual control technique is adopted that RCD cuts-off by forming a forced short circuit between the phase voltage and ground in the event of an electrical accident. Some experimental tests of the proposed system also confirm practicality and the validity of the analytical results.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.6
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• pp.390-396
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• 2021

Lithium-ion batteries have been designed and used as battery packs with series and parallel combinations that are suitable for use. However, due to its internal electrochemical properties, producing the battery's condition at the same value is impossible for individual cells. In addition, the management of characteristic deviations between individual cells is essential for the safe and efficient use of batteries as aging progresses with the use of batteries. In this work, we propose a method to manage deviation properties and detect abnormal behavior in the configuration of a combined battery pack of these multiple battery cells. The proposed method can separate and detect probabilistic low-frequency information according to statistical information based on Z-score. The verification of the proposed algorithm was validated using experimental results from 10S3P battery packs, and the implemented algorithm based on Z-score was validated as a way to effectively manage multiple individual cell information.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.3
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• pp.373-379
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• 2012

This paper presents a fault location algorithm based on the adaptively estimated value of the local sequence source impedance for faults on a parallel transmission line. This algorithm uses only the local voltage and current signals of a faulted circuit. The remote current signals and the zero-sequence current of the healthy adjacent circuit are calculated by using the current distribution factors together with the local terminal currents of the faulted circuit. The current distribution factors consist of local equivalent source impedance and the others such as fault distance, line impedance and remote equivalent source impedance. It means that the values of the current distribution factors can change according to the operation condition of a power system. Consequently, the accuracy of the fault location algorithm is affected by the two values of equivalent source impedances, one is local source impedance and the other is remote source impedance. Nevertheless, only the local equivalent impedance can be estimated in this paper. A series of test results using EMTP simulation data show the effectiveness of the proposed algorithm. The proposed algorithm is valid for a double-circuit transmission line system where the equivalent source impedance changes continuously.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.1
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• pp.75-81
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• 2017

This paper presents a design and parallel control strategy of 1.8 kW low-voltage DC-DC converter (LDC) for mild hybrid electric vehicles to improve their power density, system efficiency, and operation stability. Topology and control scheme are important on the LDC for mild hybrid electric vehicles to achieve high system efficiency and power density because of their very low voltage and large current in input and output terminals. Therefore, the optimal topological structure and control algorithm are examined, and a detailed design methodology for the power and control stages is presented. A working sample of 1.8 kW LDC is designed and implemented by applying the adopted topology and control strategy. Experimental results indicate 92.45% of the maximum efficiency and 560 W/l of power density.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.10
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• pp.1481-1487
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• 2017

This paper proposes a sensorless speed control algorithm for parallel-connected dual Surface-mounted Permanent Magnet Synchronous Motors fed by a single inverter. For stable parallel operation of synchronous motors with a single inverter, each motor has to be constantly kept in the synchronization state regardless of load torque. If the master motor with the larger load is controlled, the synchronous state will be maintained. Therefore, detection of the master motor is essential. Conventionally, the master motor is determined by comparing the rotor position error from the relation between the back-EMF for torque angle and the flux position. consequently, the position sensor is deemed essential for finding the rotor position. In this paper, we proposed a method that decides the magnitude of the load from the power angle of two motors due to the load variation and selects the motor to control through the sign function for the sensorless speed control without the position sensor. The results of simulation and experiment conducted verify the efficacy of the proposed method.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.5
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• pp.467-474
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• 2000

This paper describes the development of 7he utility vehicle controller using combination system of battery and photovoltaic power for increasing operation time. In order to keep interchangeability, low cost and high performance, a separately excited DC Motor is controlled without velocity and current measurements by $\mu$-processor. For the parallel operation between the solar cell and battery, dc-dc converter is used, which is applied to the maximum power Point tracking(MPPT) and current control algorithm. By the simulation and experimental results of trial product, the vapidity of the proposed system is verified.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.5
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• pp.1332-1344
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• 1996

This paper presents a pipelined floating point multiplier(FMUL) for superscalar microprocessors that conbines radix-16 recoding scheme based on signed-digit(SD) number system and new rouding and normalization scheme. The new rounding and normalization scheme enable the FMUL to compute sticky bit in parallel with multiple operation and elminate timing delay due to post-normalization. By expoliting SD radix-16 recoding scheme, we can achieves further reduction of silicon area and computation time. The FMUL can execute signle-precision or double-precision floating-point multiply operation through three-stage pipelined datapath and support IEEE standard 754. The algorithm andstructure of the designed multiplier have been successfully verified through Verilog HOL modeling and simulation.