• The Transactions of The Korean Institute of Electrical Engineers
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• v.68 no.2
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• pp.364-369
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• 2019

Generally, since memory chips should be tested all, considering its volume, the reduction in test time for detecting faults plays an important role in reducing the overall production cost. The parallel testing of chips in one ATE is a competitive solution to solve it. In this paper, NOC is proposed as test interface architecture between DUTs and ATE. Because NOC can be extended freely, there is no limit on the number of DUTs tested at the same time. Thus, more memory can be tested with the same bandwidth of ATE. Furthermore, the proposed NOC-based parallel test method can increase the efficiency of channel usage by packet type data transmission.

• Journal of KIISE:Information Networking
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• v.27 no.2
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• pp.237-246
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• 2000

A broadband access network in B-ISDN subscriber network, plays a role of concentration or multiplexing of various subscribers into a service node. For call and connection control functions, DSS2 and B-ISUP signalling protocols are standardized for each of a subscriber side and a network node. B-BCC and B-ANCC protocol were proposed for VB5.2 interface. This interface allows dynamic control of ATM connections at the broadband access network. To establish an end-to-end ATM connection, interworking functions between VB5.2 interface's connection control protocol and the signalling protocol, are performed at the service node. A sequential interworking model and a parallel interworking model were proposed for these interworking functions. The sequential interworking model recommended by ITU-T causes an overall connection setup delay by introducing the access network, because this model proceeds the signalling protocol of network node after the response of VB5.2 interface protocol. On the other hand, the parallel interworking model proceeds the signalling protocol and the VB5.2 interface protocol simultaneously. The simultaneity of the parallel interworking model minimizes the overall connection setup delay. In this paper, we analyze and simulate above two interworking models with B-BCC or B-ANCC protocol in terms of a connection setup delay and completion ratio.

• Journal of Internet Computing and Services
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• v.8 no.5
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• pp.11-20
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• 2007

This paper designs and implements a message passing library called JMPI (Java Message Passing Interface) which complies with MPJ (Message Passing in Java), the MPI standard Specification for Java language, This library provides some graphic user interface tools to enable parallel computing environments to be configured very simply by their administrators and JMPI applications to be executed very conveniently. Also in this paper, we implement two versions of systems using Socket and RPC which are both typical distributed system communication mechanisms and with three benchmark applications, compare performance of these systems with that of an existing system JPVM depending on the increasing number of the computers. Experimental results show that our systems outperform JPVM system in terms of various aspects and that the most efficient processing speedup can be obtained by increasing the number of the computers in consideration of network traffic through processing evaluation. Finally, we can see that, as the number of computers increases, using RMI to transmit a message is more effective than using object streams attached to sockets to transmit a message.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.4
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• pp.192-200
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• 2002

The performance of a PC cluster system is limited by the use of traditional communication protocols, such as TCP/IP because these protocols are accompanied with significant software overheads. To overcome the problem, systems based on user-level interface for message passing without intervention of kernel have been developed. The VIA(Virtual Interface Architecture) is one of the representative user-level interfaces which provide low latency and high bandwidth. In this paper, a VIA system is implemented on an SCI(Scalable Coherent Interface) network based PC cluster. The system provides both message-passing and shared-memory programming environments and shows the maximum bandwidth of 84MB/s and the latency of $8{\mu}s$. The system also shows better performance in comparison with other comparable computer systems in carrying out parallel benchmark programs.

• Journal of Convergence for Information Technology
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• v.11 no.8
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• pp.1-7
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• 2021

In this paper, a method of extending 1 bit by adding an external device to a parallel interface type Digital-to-Analog conversion(D/A C) circuit is presented. To do this, the principle of the D/A C circuit was examined, and the problems that occur when extending one bit by adding individual devices were analyzed, and a bit extension method of the D/A devices using an OP-Amp. circuit was presented. As the proposed method uses the high-precision characteristics of the OP-Amp., even if an error occurs in the device, only the overall size of the output waveform is affected, and the voltage reversal phenomenon that occurs between each bit does not occur. In order to confirm the effect of the proposed method, an experimental circuit was constructed and the absolute voltage of the output and the relative error were measured. As a result, a voltage error of 0.0756% appeared, confirming that the 0.195% requirement for one bit expansion by adding individual devices was sufficiently satisfied.

• 한국전산유체공학회:학술대회논문집
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• 2003.10a
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• pp.88-90
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• 2003

We implement Realtime Air Diffusion Prediction System which is designed for air diffusion simulations with four-dimensional data assimilation. For realtime running, we parallelize the system using MPI (Message Passing Interface) on distributed-memory parallel computers and build a cluster computer which links high-performance PCs with high-speed interconnection networks. We use 162­CPU nodes and a Myrinet network for the cluster

• Proceedings of the Korea Water Resources Association Conference
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• 2004.05b
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• pp.77-89
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• 2004

A computer model is developed to assess optimal ground water pumping rates and optimal locations of wells in a coastal region. A sharp interface model is used to simulate the freshwater and salt water flows. Drawdown, upconing, saltwater intrusion and the contamination of well are considered in this model. A genetic algorithm with parallel processing is used to identify the optimal solution.

• Structural Engineering and Mechanics
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• v.41 no.3
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• pp.395-406
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• 2012

Basic problem of pile foundation is three dimensional in nature. Three dimensional finite element formulation is employed for the analysis of pile groups. Pile, pile-cap and soil are modeled using 20 node element, whereas interface between pile or pile cap and soil is modeled using 16 node surface element. A parametric study is carried out to consider the effect of pile spacing, number of piles, arrangement of pile and soil modulus on the response of pile group. Results indicate that the response of pile group is dependent on these parameters.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.4
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• pp.38-49
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• 1998

A fossil power plant can be modeled by a lot of algebraic equations and differential equations. When we simulate a large, complicated fossil power plant by a computer such as workstation or PC, it takes much time until overall equations are completely calculated. Therefore, new processing systems which have high computing speed is ultimately needed for real-time or high-speed(faster than real-time) simulators. This paper presents an enhanced strategy in which high computing power can be provided by parallel processing of DSP processors with communication links. DSP system is designed for general purpose. Parallel DSP system can be easily expanded by just connecting new DSP modules to the system. General urpose DSP modules and a VME interface module was developed. New model and techniques for the task allocation are also presented which take into account the special characteristics of parallel I/O and computation. As a realistic cost function of task allocation, we suggested 'simulation period' which represents the period of simulation output intervals. Based on the development of parallel DSP system and realistic task allocation techniques, we cound achieve good efficiency of parallel processing and faster simulation speed than real-time.

• Journal of The Korean Astronomical Society
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• v.49 no.4
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• pp.157-162
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• 2016

High resolution reconstruction technology is developed to help enhance the spatial resolution of observational images for ground-based solar telescopes, such as speckle masking. Near real-time reconstruction performance is achieved on a high performance cluster using the Message Passing Interface (MPI). However, much time is spent in reconstructing solar subimages in such a speckle reconstruction. We design and implement a novel parallel method for speckle masking reconstruction of solar subimage on a shared memory machine using the OpenMP. Real tests are performed to verify the correctness of our codes. We present the details of several parallel reconstruction steps. The parallel implementation between various modules shows a great speed increase as compared to single thread serial implementation, and a speedup of about 2.5 is achieved in one subimage reconstruction. The timing result for reconstructing one subimage with 256×256 pixels shows a clear advantage with greater number of threads. This novel parallel method can be valuable in real-time reconstruction of solar images, especially after porting to a high performance cluster.