• Title/Summary/Keyword: Parallel detection

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A Study on Detection Performance Comparison of Bone Plates Using Parallel Convolution Neural Networks (병렬형 합성곱 신경망을 이용한 골절합용 판의 탐지 성능 비교에 관한 연구)

  • Lee, Song Yeon;Huh, Yong Jeong
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.3
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    • pp.63-68
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    • 2022
  • In this study, we produced defect detection models using parallel convolution neural networks. If convolution neural networks are constructed parallel type, the model's detection accuracy will increase and detection time will decrease. We produced parallel-type defect detection models using 4 types of convolutional algorithms. The performance of models was evaluated using evaluation indicators. The model's performance is detection accuracy and detection time. We compared the performance of each parallel model. The detection accuracy of the model using AlexNet is 97 % and the detection time is 0.3 seconds. We confirmed that when AlexNet algorithm is constructed parallel type, the model has the highest performance.

Implementation of Parallel Processing Based Pedestrian Detection Using a Modified CENTRIST Algorithm (개선된 CENTRIST 알고리즘을 적용한 병렬처리 기반 보행자 인식 구현)

  • Jung, Jun-Mo
    • Journal of IKEEE
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    • v.18 no.3
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    • pp.398-402
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    • 2014
  • In this paper, we propose a parallel processing method of pedestrian detection algorithm based on ROI-CENTRIST. There is a difficulty in the real-time processing of pedestrian detection in the embedded environment, using the conventional pedestrian detection method. This problem can be solved by a parallel processing method of applying the ROI to the conventional algorithm. The proposed parallel processing method of pedestrian detection using ROI-CENTRIST show the result of 5.2 frames per second, which is about 10% improvement over the conventional pedestrian detection method based on CENTRIST.

Performance evaluation of the single-dwell and double-dwell detection schemes in the IS-95 reverse link (IS-95역방향 링크에서 단일 적분 및 이중 적분 검색 방식의 성능 분석)

  • 강법주;박형래;손정영;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.2
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    • pp.383-393
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    • 1996
  • This paper considers the evaluation of the ecquistion performance for an accesschannel preamble based on a random access procedure of direct sequence code division multiple access(DS/CDMA) reverse link. The parallel acquistion technique that employs the single-well detection scheme and the multiple-dwell(double-dwell) detection scheme is mentioned. The acquisition performance for two detection schemes is compared in therms of the acquisition probability and the acquisition time. The parallel acquisition is done by a bank of N parallel I/Q noncoherent correlators. Expressions on the detection, false alarm, and miss probabilities of the single-dwell and multiple-dwell(double-well) detection schemes are derived for multiple H$_{1}$ cells and multipath Rayleight fading channel. comparing the single-dwell detection scheme with the multiple-dwell(double-dwell) detection scheme in the case of employing the parallel acquisition technique in the reverse link,the numerical results show that the single-dwell detection scheme deomonstrates a better performance.

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Parallel Implementation Strategy for Content Based Video Copy Detection Using a Multi-core Processor

  • Liao, Kaiyang;Zhao, Fan;Zhang, Mingzhu
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.10
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    • pp.3520-3537
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    • 2014
  • Video copy detection methods have emerged in recent years for a variety of applications. However, the lack of efficiency in the usual retrieval systems restricts their use. In this paper, we propose a parallel implementation strategy for content based video copy detection (CBCD) by using a multi-core processor. This strategy can support video copy detection effectively, and the processing time tends to decrease linearly as the number of processors increases. Experiments have shown that our approach is successful in speeding up computation and as well as in keeping the performance.

Parallel Design and Implementation of Shot Boundary Detection Algorithm (샷 경계 탐지 알고리즘의 병렬 설계와 구현)

  • Lee, Joon-Goo;Kim, SeungHyun;You, Byoung-Moon;Hwang, DooSung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.2
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    • pp.76-84
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    • 2014
  • As the number of high-density videos increase, parallel processing approaches are necessary to process a large-scale of video data. When a processing method of video data requires thousands of simple operations, GPU-based parallel processing is preferred to CPU-based parallel processing by way of reducing the time and space complexities of a given computation problem. This paper studies the parallel design and implementation of a shot-boundary detection algorithm. The proposed shot-boundary detection algorithm uses pixel brightness comparisons and global histogram data among the blocks of frames, and the computation of these data is characterized with the high parallelism for the related operations. In order to maximize these operations in parallel, the computations of the pixel brightness and histogram are designed in parallel and implemented in NVIDIA GPU. The GPU-based shot detection method is tested with 10 videos from the set of videos in National Archive of Korea. In experiments, the detection rate is similar but the computation time is about 10 time faster to that of the CPU-based algorithm.

Efficient Detection of Space-Time Block Codes Based on Parallel Detection

  • Kim, Jeong-Chang;Cheun, Kyung-Whoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.2A
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    • pp.100-107
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    • 2011
  • Algorithms based on the QR decomposition of the equivalent space-time channel matrix have been proved useful in the detection of V-BLAST systems. Especially, the parallel detection (PD) algorithm offers ML approaching performance up to 4 transmit antennas with reasonable complexity. We show that when directly applied to STBCs, the PD algorithm may suffer a rather significant SNR degradation over ML detection, especially at high SNRs. However, simply extending the PD algorithm to allow p ${\geq}$ 2 candidate layers, i.e. p-PD, regains almost all the loss but only at a significant increase in complexity. Here, we propose a simplification to the p-PD algorithm specific to STBCs without a corresponding sacrifice in performance. The proposed algorithm results in significant complexity reductions for moderate to high order modulations.

CUDA based parallel design of a shot change detection algorithm using frame segmentation and object movement

  • Kim, Seung-Hyun;Lee, Joon-Goo;Hwang, Doo-Sung
    • Journal of the Korea Society of Computer and Information
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    • v.20 no.7
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    • pp.9-16
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    • 2015
  • This paper proposes the parallel design of a shot change detection algorithm using frame segmentation and moving blocks. In the proposed approach, the high parallel processing components, such as frame histogram calculation, block histogram calculation, Otsu threshold setting function, frame moving operation, and block histogram comparison, are designed in parallel for NVIDIA GPU. In order to minimize memory access delay time and guarantee fast computation, the output of a GPU kernel becomes the input data of another kernel in a pipeline way using the shared memory of GPU. In addition, the optimal sizes of CUDA processing blocks and threads are estimated through the prior experiments. In the experimental test of the proposed shot change detection algorithm, the detection rate of the GPU based parallel algorithm is the same as that of the CPU based algorithm, but the average of processing time speeds up about 6~8 times.

Properties of Detection Matrix and Parallel Flats fraction for $3^n$ Search Design+

  • Um, Jung-Koog
    • Journal of the Korean Statistical Society
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    • v.13 no.2
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    • pp.114-120
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    • 1984
  • A parallel flats fraction for the $3^n$ design is defined as union of flats ${t}At=c_i(mod 3)}, i=1,2,\cdots, f$ and is symbolically written as At=C where A is rank r. The A matrix partitions the effects into n+1 alias sets where $u=(3^{n-r}-1)/2. For each alias set the f flats produce an ACPM from which a detection matrix is constructed. The set of all possible parallel flats fraction C can be partitioned into equivalence classes. In this paper, we develop some properties of a detection matrix and C.

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Fault Detection and Isolation of Parallel Operation of Two Converters Using Zero Current Transformer Method (영상변류기 동작 방식을 이용한 2개의 컨버터 병렬 운전시 고장 탐지 및 분리)

  • 손승찬;성세진
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.4
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    • pp.409-416
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    • 2000
  • In case of operating two converters in parallel with ZCT operation method using one current sensor for fault tolerance by system characteristics, identifying fault detection and isolation is difficult of which converter is fault since the ZCT output is a difference of two converters' supply current when a converter has fault. This thesis suggest a fault detection and isolation method of converter in case of operating two converters in parallel for fault tolerant system and verified this suggested method through an experiment.

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Cellular Parallel Processing Networks-based Dynamic Programming Design and Fast Road Boundary Detection for Autonomous Vehicle (셀룰라 병렬처리 회로망에 의한 동적계획법 설계와 자율주행 자동차를 위한 도로 윤곽 검출)

  • 홍승완;김형석
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.53 no.7
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    • pp.465-472
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    • 2004
  • Analog CPPN-based optimal road boundary detection algorithm for autonomous vehicle is proposed. The CPPN is a massively connected analog parallel array processor. In the paper, the dynamic programming which is an efficient algorithm to find the optimal path is implemented with the CPPN algorithm. If the image of road-boundary information is utilized as an inter-cell distance, and goals and start lines are positioned at the top and the bottom of the image, respectively, the optimal path finding algorithm can be exploited for optimal road boundary detection. By virtue of the parallel and analog processing of the CPPN and the optimal solution of the dynamic programming, the proposed road boundary detection algorithm is expected to have very high speed and robust processing if it is implemented into circuits. The proposed road boundary algorithm is described and simulation results are reported.