• Journal of Industrial Technology
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• v.21 no.A
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• pp.97-103
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• 2001

This paper presents the development of the I/O Interface for the real time parallel data communication between controller of a six-axis industrial robot(CRS-A460) and an external computer. The proposed I/O Interface consists of the hardware I/O interface and the software that is downloaded to the robot controller and executed by the controller operating system. The constitution of the digital I/O Port for CRS-A460 robot controller and the digital I/O board for IBM-PC are presented as well as the Process Control Program of the robot controller. The developed protocol for the parallel data communication is described. The data communication is tested, and the performance is analysed. In particular, it is shown that the real-time constraint of the robot controller process is satisfied.

• Journal of the Korea Computer Industry Society
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• v.7 no.3
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• pp.185-190
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• 2006

In this paper, a simple parallel compiler using of Parafrase II is presented. This is a new general method the extracting parallelism in order to parallel processing effectively in nested loop. For this, the source program of Parafrase II parallel compiler is analyzed and implemented. Moreover, this method can be applicable where the dependency relation is both uniform and non-uniform in distance.

• Journal of the Korea Computer Industry Society
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• v.3 no.8
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• pp.981-988
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• 2002

In this paper, a simple parallel compiler of a sequential loop is presented. This is a procedure for the automatic conversion of a sequential loop into a nested parallel DOALL loops at compile time. For this. the source program of Parafrase II parallel compiler is analyzed and a new general method the extracting parallelism in order to parallel processing effectively in nested loop is implemented.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.53 no.3
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• pp.168-174
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• 2004

This paper describes a new fault location algorithm based on the voltage equation at the relaying point using 6-phase current for untransposed 765㎸ parallel transmission lines. The proposed method uses the voltage and current collected at only the local end. By means of 3-phase circuit analysis theory to compensate the mutual coupling effects between parallel lines, the fault location is derived. The fault distance is determined by solving the 2nd distance equation based on KVL(Kirchhoff's Voltage Law). Extensive simulation results using EMTP(Electromagnatic Transients Program) have verified that the error of the fault location achieved is up to 4.56(%) in untransposed parallel transmission lines.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.1
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• pp.53-58
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• 2008

A pellet program including a nested parallelism has a result of non-deterministic because of executed concurrently without synchronization. In order to detect like this error the visualization technique which is various is used. But the intuition characteristic is decreased because of limits of space and excessive abstraction. In this paper, proposes 3-D visualization engines which provide global structure of the arranging in a parallel program with nested parallelism which is complicated to the user. The visualization engine which is proposed provides global structure to the user as program easily to understand, it provides an effective debugging environment.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.29B no.4
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• pp.1-11
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• 1992

A parallel computer "KAPAC(KAIST Parallel Computer)" based on Transputer is designed and implemented. Its purpose is to support the real time processing and high perfomance computing through parallelizing the complex and heavy computation load. KAPAC has UNIX machine as host-computer and is implemented on VME bus as back-end machine. The parallel computer "KAPAC" is the message-passing loosely-coupled multiprocessor computer having thirty two processing elements, and the network topology between processing elements can be easily configured with the crossbar switchs using the control program. Various topologies are introduced and appoication programs are executed on the parallel computer "KAPAC" with eifferent interconnection topologies to show the reconfigurability.to show the reconfigurability.

• Journal of Korea Multimedia Society
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• v.3 no.3
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• pp.309-319
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• 2000

The purpose of a parallel scheduling under a multiprocessor environment is to carry out the scheduling with the minimum synchronization overhead, and to perform load balance for a parallel application program. The processors calculate the chunk of iteration and are allocated to carry out the parallel iteration. At this time, it frequently accesses mutually exclusive global memory so that there are a lot of scheduling overhead and bottleneck imposed. And also, when the distribution of the parallel iteration in the allocated chunk to the processor is different, the different execution time of each chunk causes the load imbalance and badly affects the capability of the all scheduling. In the paper. we investigate the problems on the conventional algorithms in order to achieve the minimum scheduling overhead and load balance. we then present a new parallel loop scheduling algorithm, considering the locality of the data and processor affinity.

• Journal of Power System Engineering
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• v.16 no.4
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• pp.12-16
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• 2012

In this paper, the equations of motions for planar multibody dynamics are established for considering the parallel programming based on GPU. Cartesian coordinates are used to formulate the equations of motion and implicit integration method called HHT-alpha is employed. Open chain multibody system is considered for computer simulation. CUDA toolkit is employed for establishing the GPU parallel programming. The exactness of the analysis is verified from the comparison with ADAMS. The results from parallel computing based on GPU are compared with the results from the sequential programming based on CPU in terms of calculation time. The multiple pendulum with bodies and joints is employed for the computer simulation. In the pendulum system that has 290 bodies, the parallel program indicates an improved efficiency of about 25.5 second(15.5% improvement). It is noted that the larger the size of system is, the time efficiency is better.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.3
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• pp.236-242
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• 2004

In this paper, we propose an approach to parallelize a load balancing algorithm that was shown to be very effective in distributing workload for parallel computations. Load balancing algorithms are required in executing parallel program efficiently As a parallel computation model, we used dynamically growing tree structure that can be found in many application problems. The load balancing algorithm tries to balance the workload among processors while keeping the communication cost under certain limit. We show how the load balancing algorithm is effectively parallelized on mesh and hypercube interconnection networks, and analyzed the time complexity for each case to show that parallel algorithm actually reduced the various overhead.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.1
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• pp.138-144
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• 2010

Tachyon primary system which introduces recently is a high performance supercomputer that composed with AMD Barcelona nodes. In this paper, we will verify the performance and parallel scalability of TachyonIn by using multi-zone NAS Parallel Benchmark(NPB) which is one of a program with hybrid parallel method. To test performance of hybrid parallel execution, B and C classes of BT-MZ in NPB version 3.3 were used. And the parallel scalability test has finished with Tachyon's 1024 processes. It is the first time in Korea to get a result of hybrid parallel computing calculation using more than 1024 processes. Hybrid parallel method in high performance computing system with multi-core technology like Tachyon describes that it can be very efficient and useful parallel performance benchmarks.