• Transactions of the Korean Society of Mechanical Engineers B
• /
• v.21 no.8
• /
• pp.1024-1033
• /
• 1997

The past several years have witnessed an ever-increasing acceptance and adoption of parallel processing, both for high performance scientific computing as well as for more general purpose applications. Furthermore with increasing needs to perform the complex flow calculations in an efficient manner, the use of the message passing model on distributed networks has emerged as an important alternative to the expensive supercomputers. This work attempts to provide a generic framework to enable the parallelization of all CFD-related works using the master-slave model. This framework consists of (1) input geometry, (2) domain decomposition, (3) grid generation, (4) flow computations, (5) flow visualization, and (6) output display as the sequential components, but performs computations for (2) to (5) in parallel on the workstation clustering. The flow computations are parallized by having multiple copies of the flow-code to solve a PDE on different spatial regions on different processors, while their flow data are exchanged across the region boundaries, and the solution is time-stepped. The Parallel Virtual Machine (PVM) is used for distributed communication in this work.

• Journal of Satellite, Information and Communications
• /
• v.9 no.4
• /
• pp.73-76
• /
• 2014

With the increasing popularity of multi-core processors, they have been adopted even in embedded systems. Under this circumstance many multimedia applications can be parallelized on multi-core platforms because they usually require heavy computations and extensive memory accesses. This paper proposes an efficient thread-level parallel implementation for color space conversion on multi-core CPU. Thread-level parallelism has been becoming very useful parallel processing paradigm especially on shared memory computing systems. In this work, it is exploited by allocating different input pixels to each thread for concurrent loop executions. For the performance evaluation, this paper evaluate the performace improvements for color conversion on multi-core processors based on the processing speed comparison between its serial implementation and parallel ones. The results shows that thread-level parallel implementations show the overall similar ratios of performance improvements regardless of different multi-cores.

• 한국전산유체공학회:학술대회논문집
• /
• 2011.05a
• /
• pp.327-330
• /
• 2011

CFD simulation is widely used in various industries, universities and research centers. In Korea most of the researchers use foreign commercial S/W packages especially in industries. But commercial CFD packages have some problems as limit to source code and very high license foe. So from several years ago open source CFD code has been widely spread as an alternative. But in Korea there are a few users of open source code. Insufficiency of performance validation as for accuracy, robustness, convenience and parallel speed-up is important obstacles of open source code. So we tested some validation cases as to incompressible external aerodynamics and internal flaws and now are doing compressible flaws. As the first stage of compressible flow validation, we simulated Korea next generation high speed train(HEMU). It's running condition is 400km/hr and maximum Mach number reaches up to 0.4. With the high speed train we tested accuracy, robustness and parallel performance of open source CFD code OpenFOAM Because there isn't experimental data we compared results with widely used commercial code. When use $1^{st}$ order upwind scheme aerodynamic forces are very similar to commercial code. But using $2^{nd}$ order upwind scheme there was some discrepancy. The reason of the difference is not clear yet. Mesh manipulation, domain decomposition, post-processing and robustness are satisfactory. Paralle lperformance is similar to commercial code.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
• /
• v.10 no.1
• /
• pp.7-13
• /
• 2011

Matrix multiplication is a fundamental operation of linear algebra and arises in many areas of science and engineering. This paper introduces an efficient parallel matrix multiplication scheme on N ${\times}$ N mesh-connected SIMD array processor, called multiple hierarchical SIMD architecture (HMSA). The architectural characteristic of HMSA is the hierarchically structured control units which consist of a global control unit, N local control units configured diagonally, and $N^2$ processing elements (PEs) arranged in an N ${\times}$ N array. PEs are communicating through local buses connecting four adjacent neighbor PEs in mesh-torus networks and global buses running across the rows and columns called horizontal buses and vertical buses, respectively. This architecture enables HMSA to have the features of diagonally indexed concurrent broadcast and the accessibility to either rows (row control mode) or columns (column control mode) of 2D array PEs alternately. An algorithmic mapping method is used for performance evaluation by mapping matrix multiplication on the proposed architecture. The asymptotic time complexities of them are evaluated and the result shows that paralle matrix multiplication on HMSA can provide significant performance improvement.

• Journal of Korea Multimedia Society
• /
• v.14 no.5
• /
• pp.669-680
• /
• 2011

R-trees are widely used in various areas such as geographical information systems, CAD systems and spatial databases in order to efficiently index multi-dimensional data. As data sets used in these areas grow in size and complexity, however, range query operations on R-tree are needed to be further faster to meet the area-specific constraints. To address this problem, there have been various research efforts to develop strategies for acceleration query processing on R-tree by using the buffer mechanism or parallelizing the query processing on R-tree through multiple disks and processors. As a part of the strategies, approaches which parallelize query processing on R-tree through Graphics Processor Units(GPUs) have been explored. The use of GPUs may guarantee improved performances resulting from faster calculations and reduced disk accesses but may cause additional overhead costs caused by high memory access latencies and low data exchange rate between GPUs and the CPU. In this paper, to address the overhead problems and to adapt GPUs efficiently, we propose a novel approach which uses a GPU as a buffer to parallelize query processing on R-tree. The use of buffer algorithm can give improved performance by reducing the number of disk access and maximizing coalesced memory access resulting in minimizing GPU memory access latencies. Through the extensive performance studies, we observed that the proposed approach achieved up to 5 times higher query performance than the original CPU-based R-trees.