• Journal of the Korea Convergence Society
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• v.8 no.12
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• pp.23-29
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• 2017

This paper introduces the mold technology for the development of ultra-compact package of less than 1mm, and also analyze the error pattern of the results using this mold technology. The existing ultra-small mold structure was one-piece, which caused the surface of EDM to be rough and increase the error rate. This has been an obstacle to further reducing the size of the mold. On the other hand, the proposed mold technology tries to overcome the limitation of the one-piece type by using the prefabricated type method. This paper also classify defect patterns in the results of the proposed mold structure and analyze the occurrence probability of each pattern to use as a basic data to develop a detector.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.11a
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• pp.124-128
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• 2001

We apply for the first time a low cost and loss wafer level packaging technology for RF-MEMS device. The proposed structure was simulated by finite element method (FEM) tool (HFSS of Ansoft). S-parameter measured of the package shows the return loss (S11) of 20dB and the insertion loss (S21) of 0.05dB.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.4 s.33
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• pp.13-22
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• 2004

In MEMS devices, packaging induced stress or stress induced structure deformation become increasing concerns since it directly affects the performance of the device. In this paper, deformation behavior of MEMS gyroscope package subjected to temperature change is investigated using high-sensitivity moire interferometry. Using the real-time moire setup, fringe patterns are recorded and analyzed at several temperatures. Temperature dependent analyses of warpages and extensions/contractions of the package are presented. Linear elastic behavior is documented in the temperature region of room temperature to $125^{\circ}C$. Analysis of the package reveals that global bending occurs due to the mismatch of thermal expansion coefficient between the chip, the molding compound and the PCB. Detailed global and local deformations of the package by temperature change are investigated, concerning the variation of natural frequency of MEMS gyro chip.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.4
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• pp.31-39
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• 2021

In this paper, warpage analysis that separates PCB for PoP (Package on Package) into unit and substrate using FEM (Finite Element Method), analysis of the effect of layer thickness on warpage, and SN (Signal-to-Noise) ratio by Taguchi method was carried. According to the analysis result, the contribution of the circuit layer on warpage was very high in the unit PCB, and the contribution of the outer layer was particularly high. On the other hand, the substrate PCB had a high influence of the circuit layer on warpage, but it was relatively low compared to the unit PCB, and the influence of the solder resist was rather increased. Therefore, considering the unit PCB and the substrate PCB at the same time, it is desirable to design the PCB for PoP layer-by-layer structure so that the outer and inner circuit layers are thick, the top solder resist is thin, and the thickness of the bottom solder resist is between 5 ㎛ and 25 ㎛.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.2
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• pp.75-84
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• 2005

This research is to design a high performance NAND-type flash memory package with a smart buffer cache that enhances the exploitation of spatial and temporal locality. The proposed buffer structure in a NAND flash memory package, called as a smart buffer cache, consists of three parts, i.e., a fully-associative victim buffer with a small block size, a fully-associative spatial buffer with a large block size, and a dynamic fetching unit. This new NAND-type flash memory package can achieve dramatically high performance and low power consumption comparing with any conventional NAND-type flash memory. Our results show that the NAND flash memory package with a smart buffer cache can reduce the miss ratio by around 70% and the average memory access time by around 67%, over the conventional NAND flash memory configuration. Also, the average miss ratio and average memory access time of the package module with smart buffer for a given buffer space (e.g., 3KB) can achieve better performance than package modules with a conventional direct-mapped buffer with eight times(e.g., 32KB) as much space and a fully-associative configuration with twice as much space(e.g., 8KB)

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1228-1238
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• 2012

In this paper, we design, fabricate and measure two kinds of high-frequency packages for K-band CMOS FMCW radar chips using RF via structures. The packages are fabricated with the conventional PCB process and LTCC process. The design centering of the packages is performed at 24 GHz and impedance variation caused by the wire bonding and RF via structure is fully evaluated using 3D electromagnetic simulation. The RF via structure with characteristic impedance of $50{\Omega}$ is used to reduce impedance mismatch loss. Two kinds of test packages with back-to-back connected RF paths are fabricated and measured for the design verification of the PCB-based package and LTCC package. Their measured results show an insertion loss of less than 0.4 dB at 24 GHz and less than 0.5 dB for 20~29 GHz. The measured return loss is less than -13 dB for the PCB-based package and less than -15 dB for the LTCC package in the frequency band, but the return loss of the package itself is predicted to be better than that of the test package by about 5 dB, because the ripples of the back-to-back connection typically degrade the return loss by 5 dB or more.

• Journal of Institute of Control, Robotics and Systems
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• v.13 no.11
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• pp.1128-1136
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• 2007

This paper presents an application study of a model predictive control based commercial package PCTP to real chemical processes. The first case study concerns a product purity control of a splitter process which distillates styrene from undesired component ethyl-benzene produced from ethyl-benzene dehydrogenation reaction. The second case study is about a temperature control of ethyl-benzene dehydrogenation reactor and an excess oxygen control of the fired heater. Optimum control structure for MPC application is developed for each case study. The application results show a significant improvement in control performance and stability.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.12
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• pp.34-41
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• 2011

In order to understand the thermal performance of each LED chips in multi-chip LED package, a quantitative parametric analysis of the temperature evolution was investigated by thermal transient analysis. TSP (Temperature Sensitive Parameter) value was measured and the junction temperature was predicted. Thermal resistance between the p-n junction and the ambient was obtained from the structure function with the junction temperature evolution during the cooling period of LED. The results showed that, the thermal resistance of the each LED chips in 4 chip-LED package was higher than that of single chip- LED package.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.12S
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• pp.1237-1241
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• 2003

In this paper, we report a novel RF-MEMS packaging technology with lightweight, small size, and short electric path length. To achieve this goal, we used the ultra thin silicon substrate as a packaging substrate. The via holes lot vortical feed-through were fabricated on the thin silicon wafer by wet chemical processing. Then, via holes were filled and micro-bumps were fabricated by electroplating. The packaged RF device has a reflection loss under 22 〔㏈〕 and a insertion loss of -0.04∼-0.08 〔㏈〕. These measurements show that we could package the RF device without loss and interference by using the vertical feed-through. Specially, with the ultra thin silicon wafer we can realize of a device package that has low-cost, lightweight and small size. Also, we can extend a 3-D packaging structure by stacking assembled thin packages.

• Journal of the Korean Society for Library and Information Science
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• v.54 no.4
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• pp.261-281
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• 2020

The importance of long-term preservation of various types of electronic records through dark archives is gradually increasing. However, the current dark archive does not have an optimized information package structure for long-term preservation of electronic records. In order to address these problems, this research proposed four element categories by re-organizing the OAIS reference model information package based on the core process of the dark archiving. The detailed descriptive items of each category consist of a total of 4 upper-level elements and 27 sub elements based on the OAIS reference model, ISO 23081, Records Management Metadata Standard, ISAD(G), ISAAR(CPF), ISDF, and ISDIAH. This structure can be used as a basis for constructing an information package optimized for dark archiving, and is expected to support the long-term preservation of electronic records more efficiently.