• Title/Summary/Keyword: PNA chip

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Design and Implementation of HomePNA 2.0 MAC Controller Circuit (HomePNA 2.0 MAC Controller 회로의 설계 및 구현)

  • Kim, Jong-Won;Kim, Dae-Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.1A
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    • pp.1-10
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    • 2006
  • The Home Phoneline Networking Alliance(HomePNA) 2.0 technology can establish a home network using existing in-home phone lines, which provides a channel rate of 4-32 Mbps. HomePNA 2.0 Medium Access Control(MAC) protocol adopts an IEEE 802.3 Carrier Sense Multiple Access with Collision Detection(CSMA/CD) access method, Quality of Service(QoS) algorithm, and Distributed Fair Priority Queuing(DFPQ) collision resolution algorithm. In this paper, we describe some performance analysis results of HomePNA 2.0 MAC protocol and the requirements of HomePNA 2.0 MAC controller. Then, we propose the architecture of HomePNA 2.0 MAC controller circuit, show the simulation result of each block included in HomePNA 2.0 MAC controller, and present the HomePNA 2.0 transceiver chip that we have implemented.

Design of Receiver Architecture for HomePNA 2.0 Modem (HomePNA 2.0 모뎀 수신부 설계)

  • Choi, Sung-Woo;Kim, Jong-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.9A
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    • pp.991-997
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    • 2004
  • In this paper, we propose the architecture of modem receiver to fabricate HomePNA 2.0 chip. HomePNA suffers from inferior channel because of bridge tap, the effect of amateur HAM band and so on. To transfer data over such channel, HomePNA 2.0 uses training sequence to equalize channel and uses FD-QAM optionally as modulation method. So modem receiver demodulate QAM based signal and needs optimum architecture that fully uses these transmission feature. As a result of research, we define 2 mode function of modem receiver depending on TX/RX state. In this paper, particularly, we show the algorithm of equalizer, carrier phase recovery and frame synchromzationblock and propose architecture that improve the performance of channel equalization and is stable in operation. In the end, we estimate the performance of proposed HomePNA2.0 modem receiver over HomePNA TEST LOOP using SPW program.

Fabrication of Nanogap-Based PNA Chips for the Electrical Detection of Single Nucleotide Polymorphism

  • Park, Dae-Keun;Park, Hyung-Ju;Lee, Cho-Yeon;Hong, Dae-Wha;Lee, Young;Choi, In-Sung S.;Yun, Wan-Soo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.540-540
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    • 2012
  • Selective detection of single nucleotide polymorphism (SNP) of Cytochrome P450 2C19 (CYP2C19) was carried out by the PNA chips which were electrically-interfaced with interdigitated nanogap electrodes (INEs). The INEs whose average gap distance and effective gap length were about ~70 nm and ${\sim}140{\mu}m$, respectively, were prepared by the combination of the photo lithography and the surface-catalyzed chemical deposition, without using the e-beam lithography which is almost inevitable in the conventional lab-scale fabrication of the INEs. Four different types of target DNAs were successfully detected and discriminated by the INE-based PNA chips.

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