• Title/Summary/Keyword: PLC Interface

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A Study on Wired LogiC for Type Unit for PLC Output Driving (PLC 출력 구동을 위한 Wired Logic for Type Unit에 관한 연구)

  • 위성동;김태성
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.36T no.1
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    • pp.51-57
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    • 1999
  • This thesis is written about the Wired Logic Type Unit in developing equipment that the load is driven, that the interface unit connect with 1 Scan time to PO30 of operated PLC output contact with that a sensing signal of Temperature Sensor RSD Pt $100\Omega$ let generate the relay output of temperature controller and input the PLC. The PLC Test Kit in country that the PLC to be programmed at the PLC education place is able to drive the load, is done to do a education of PLC on status that interface process between PLC and load are disregarded. As Developing Kit for supplement this point, when the relay output of temperature controller to use Pt 100 of temperature sensor as mentioned on the former among every kinds of sensor feed back to the input of the PLC, as the equipment to act with real time system that the output contact of PLC operated to insert the WLTIJ among PC, PLC and the load, it can understand and see very easy the main principle of PLC use. The structure of WLTU to be a interface unit of load separated as to the point of contact and noncontact, sensor, indicating lamp and A contact and B contact that is belong to driving part, and a motor is belong to loading part.

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A Development of a wireless control module for PLC system (근거리 원격 자동화를 위한 무선 PLC 통신 모듈 개발)

  • 박종석;현웅근
    • Proceedings of the IEEK Conference
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    • 2000.06e
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    • pp.89-92
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    • 2000
  • A wire communication module for PLC controller was developed. This system consists of RF module interface part, RS232 serial communication control part, LED display part and control S/W with GUI interface. RF communication frequency is controlled by PLL controlling and communication rate is also controlled as 1200 and 4800 bps. Communication and control status are displayed on LED. As a S/W part, graphic user interface on Window 95 O.S. was developed. To show the validity of the developed system, severial communication and control of PLC system were experemented.

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A Study on a Communication Data Item and Method in PLC communication with Computer for FA Information System (FA정보시스템에서의 PLC 정보처리에 대한 연구)

  • Lee, Hun-Joon;Kim, Young-Tae;Kim, Sung-Kwun
    • IE interfaces
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    • v.8 no.3
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    • pp.241-248
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    • 1995
  • Fa SI(Sysrem Intergration)분야에 있어서 PLC(Programmable Logic Controller)와 컴퓨터간의 접속은 필수 불가결한 요소기술로 자리잡고 있으며, 이러한 기술변화에 맞춰서 기존 유니트의 기술적 발전뿐 아니라 타 유니트와 접속등의 네트워킹에 관련된 내용이 하드웨어, 소트프웨어적으로 발전되고 있는 추세이다. 시스템통합을 하기 위해서는 기본적으로 PLC Networking을 하드웨어, 소프트웨어적으로 수행하여야 하나, 많은 연구들이 PLC 통신 유니트의 기술적 향상 및 표준화에 대한 부분으로 되어왔었다. 본 논문은 정보시스템을 구축할 때 PLC에서 처리하여야 하는 데이터, 혹은 컴퓨터와 송수신 받아야 하는 자료들에 대한 내용과 이들 자료를 PLC 내부에서 처리하는 방법론에 대해 기술코자 한다. 일반적인 Interface 방법으로 접점연결(Point to Point Connection)과 컴퓨터링크유니트에 대한 내용을 파악해보고, 설비고장진단 및 이상발생에 대한 추적이 가능하도록 PLC Memory내에 PLC접점데이타를 직접접근방식(Direct Accssing Method)과 간접접근방식 (Indirect Accssing Method)으로 구분하고, 간접접근방식을 요소(Element), 동작(Event)에 의한 방법론을 이용하여 PLC DATA를 처리토록 하는 내용을 설명하고자 한다.

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Firmware and UI for Power Line Communication Based Public Address System (전력선 통신 기반 전관 방송시스템의 펌웨어와 UI)

  • Kim, Seok;Kim, Dae-Ik
    • The Journal of the Korea institute of electronic communication sciences
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    • v.14 no.1
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    • pp.127-136
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    • 2019
  • The public address system should be easily operated and managed by the users, and guaranteed to serve stable working in an emergency and a crisis. In this paper, In this paper, to provide power line communication based public address system users with convenience and efficiency, we implement a firmware to control communication between a PLC(: Power Line Communication) controller of the public address system and UI(: User Interface) and between a PLC controller of the public address system and PLC speakers, and develop a UI software.

Configuration of Actuator and Sensor Interface Bus Network using PLC

  • Luu, Hoang-Minh;Park, Young-San
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.20 no.3
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    • pp.318-322
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    • 2014
  • A kind of field bus called Actuator and Sensor interface bus(AS-i) was designed in this paper. The configuration of AS-i network system used Application Specific Integrated Circuit(ASIC) SAP5S chip and PLC S7-200 station, which included CPU 224 and AS-i master module CP 243-2. We also created an example program for PLC S7-200 to control AS-i network. The fire and smoke detection system was made with AS-i network system that was designed. This system had got more advantages than other system such as number of stations, easy installation, wide working area, etc. And designed system can be used as a partner network for higher level field bus networks.

Design of the Real-time Water Tank Wireless Control System in a Ship Using the RF and PLC (RF와 PLC를 이용한 실시간 선박용 물탱크 무선 제어 시스템 설계)

  • Park, O.D.;Lee, S.H.;Kim, H.S.;Long, Nguyen Phi;Hieu, Nguyen Hoang;Kim, H.S.;Cha, C.S.
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.288-290
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    • 2006
  • This paper presents the real-time water tank wireless control in a ship using duplex RF modules and PLC(Programmable logic Controller). The purpose of this paper is developing HMI(Human Machine Interface) for automation equipments. The system can low a cost because long wires are no more used. Analog signals of the water gauge and flow meter are changed to discrete signals by the micro-processor. The PLC checks the volume of water and runs On or Off of the valve and pump. Duplex RF modules send and receive data between the water tank and control room. Everywhere the Internet is used, operators are able to check the status of the system by the web-server.

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A Development of Power Control System Logic Cabinet Using Programmable Logic Controller (PLC를 이용한 출력제어계통 논리 캐비넷 개발)

  • Park, Hyun-Shin;Park, Jong-Berm;Yang, Seung-Kwon;Chung, Hak-Yeong
    • Proceedings of the KIEE Conference
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    • 1998.07b
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    • pp.772-774
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    • 1998
  • MMIS System of KNGR is composed of systems by using of digital equipment in general, and also interface function among systems is completed by a network. According to this, KNGR PCS also got rid of many kinds of interface cards which have been used for hardwired interface to outside system, and most of function in these cards is to be programmed by PLC. This paper defines the function and method which is to be programmed to PLC. And this paper presents new function which is to be added for operator's interface by using network. It is expected that PCS logic cabinet will be more simplified, satisfy KNGR design concept, and operation convenience will be increased.

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Protocol Monitor System Between Cortex M7 Based PLC And HMI

  • Kim, Ki-Su;Lee, Jong-Chan;Ha, Heon-Seong
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.6
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    • pp.17-23
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    • 2020
  • In this paper, collecting real-time data frames that occur during RS232 communication between an HMI and PLC of automation equipment by sniffing real-time information data frames through MCU without modification of the HMI or PLC, a method is proposed that allows users to collect data without being dependent on the modification of PLC and HMI systems. The user collects necessary information from the sniffing data through the parsing operation, and the original communication interface is maintained by transmitting the corresponding sniffing frame to the destination. The MCU's UART communication interface circuit is physically designed according to the RS232 communication standard, and this additionally improves efficiency more so than an interrupt-based system by using the DMA device inside the MCU. In addition, the data frame IO operation is performed by logically separating the work of the DMA interrupt service routine from the work of the main thread using the circular queue. Through this method, the user receives the sniffing data frame between the HMI and PLC in RS232 format, and the frame transfer between PLC and HMI arrives normally at the original destination. By sniffing the data frame without further modification of the PLC and HMI, it can be confirmed that it arrives at the user system normally.

System Design of High-Definition Media Transceiver based on Power Line Communication and Its Performance Analysis (전력선 통신 기반 HD급 미디어 전송 시스템 설계 및 성능 분석)

  • Kim, Ji-Hyoung;Kim, Kwan-Woong;Kim, Yong-K.
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.1
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    • pp.192-196
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    • 2010
  • Due to a development of a modem technology as Power Line Communication(PLC) over 200 Mbps, the high-speed multi-media data trasmission could be currently possible. The strength of the PLC has no more additional wiring work. PLC has also possible to high quality data transmission with currently electrical cable. It has a various strong point campare with existing wire and wireless communication technologies. In This paper we develop a high quality media transmitter-receiver based on merging the HomePlug AV, which is 200 Mbps class PLC technology and HDMI Interface technology. The video function was used for the VEDEO TEST GENERATOR in order to a property valuation. Smart Live 6 software were used for the assessment of audio property. As the result of measurement of the HD class images by capturing from the receiver of the PLC, the quality of images couldn't be confirm any deterioration, which has compared with original reflections. In case of audio part as the result of confirmation of the Phase, Magnitude, it has been confirmed that over 90% of nomal transmition and receiving of acoustic signal. It can be possible to have HD class Media service through the PLC.

An Implementation of Bit Processor for the Sequence Logic Control of PLC (PLC의 시퀀스 제어를 위한 BIT 연산 프로세서의 구현)

  • Yu, Young-Sang;Yang, Oh
    • Proceedings of the KIEE Conference
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    • 1999.07g
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    • pp.3067-3069
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    • 1999
  • In this paper, A bit processor for controlling sequence logic was implemented, using a FPGA. This processor consists of program memory interface. I/O interface, parts for instruction fetch and decode, registers, ALU, program counter and etc. This FPGA is able to execute sequence instruction during program fetch cycle, because of divided bus system, program bus and data bus. Also this bit processor has instructions set that 16bit or 32bit fixed width, so instruction decoding time and data memory interface time was reduced. This FPGA was synthesized by pASIC 2 SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package. Finally, the benchmark was performed to prove that Our FPGA has better performance than DSP(TMS320C32-40MHz) for the sequence logic control of PLC.

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