• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.486-490
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• 2004

Programmable logic controller (PLC) is widely used in manufacturing system or process control. This paper presents the design of a 32-bit microprocessor for a sequence control using an Application Specification Integrated Circuit (ASIC). The 32-bit microprocessor was designed by a VHDL with top down method; the program memory was separated from the data memory for high speed execution of 274 specified sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. And in order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32-bits. And the real time debugging as single step run, break point run was implemented. Pulse instruction, step controller, master controllers, BIN and BCD type arithmetic instructions, barrel shit instructions were implemented for many used in PLC system. The designed microprocessor was synthesized by the S1L50000 series which contains 70,000 gates with 0.65um technology of SEIKO EPSON. Finally, the benchmark was performed to show that designed 32-bit microprocessor has better performance than Q4A PLC of Mitsubishi Corporation.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2008.05a
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• pp.249-251
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• 2008

In Factory Automation(FA) used by Programmable Logic Controller(PLC), Ladder Diagram(LD) is the most widely utilized and plays an important role in industrial control system. But recently, the study about Sequential Function Chart(SFC) is performed actively. When we program by SFC, generally, we design one routine from start to end. This method is difficult to design block control system, and we often make mistakes. In this paper, we propose the method that we design block control system and we analysis the difference of the method used this paper from conventional method.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.752-755
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• 1997

In this paper, a scheduling algorithm is proposed for a programmable logic controller(PLC) with remote I/Os, assuming the multi-tasking facilities. Since sequence programs are executed on the application processor and I/O data are transmitted by the network processor concurrently, the proposed algorithm schedules the data transmission as well as the sequence program execution. The suggested algorithm guarantees the bounded WCRT(worst case response time), which is the one third of the WCRT in the absence of scheduling. Computer simulation shows that the algorithm can be easily applied to a real PLC without critical constraints on utilization of resources and inter-relation among tasks.

• Proceedings of the IEEK Conference
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• 2009.05a
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• pp.305-307
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• 2009

When we design the control system used Programmable Logic Controller(PLC), we program the main algorithm by Ladder Diagram(LD) among the standard language. We can substitute the select sequence function by the unique sequence. We can implement this function by the delay time. Therefore this thesis show the select sequence function by the unique sequence and we confirmed its feasibility through actual example.

• Journal of Wind Energy
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• v.15 no.1
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• pp.60-68
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• 2024

In this study, a hardware-in-the-loop simulation (HILS) environment was established using MATLAB/Simulink to simulate and verify the power performance of a wind turbine. The target wind turbine was selected as the NREL 5 MW model, and modeling was performed based on the disclosed specifications. The HILS environment consists of a PC equipped with a MATLAB/Simulink program, a programmable logic controller (PLC) for uploading and linking control algorithms, and data acquisition (DAQ) equipment to manage wind turbine data input and output. The operation of the HILS environment was carried out as a procedure of operation (PC) of the target wind turbine modeled based on MATLAB/Simulink, data acquisition (PLC) of control algorithms, control command calculation (PLC), and control command input (PC). The simulation was performed using the HILS environment under turbulent wind conditions and compared with the simulation results performed under the same conditions in the HILS environment using the commercial program Bladed for performance verification. From the comparison, it was found that the dynamic simulation results of the Bladed HILS and the MATLAB HILS were close in power performances and the errors in the average values of rotor rotation speed and power generation between the two simulations were about 0.44 % and 3.3 %, respectively.

• Journal of the Korean Society for Precision Engineering
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• v.20 no.10
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• pp.89-97
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• 2003

The faults diagnosis of machine tool, which is controlled by CNC(Computer Numerical Control) and PLC(Programmable Logic Controller), is generally based on ladder diagram of PLC because sequential controls for CNC and servo motor are mostly processed in PLC. However, when fault is occurred, a searching of logical relationship for fault reasons is required a lot of diagnosis experiences and times because PLC program has step structure. In this paper, FDS(Fault Diagnosis System) is developed and implemented to machine tool with open architecture controller in order to find the reason of fault fast and correctly. The diagnosed reasons for fault are remote serviced on web through developed RSS(Remote Service System). The operationability and usefulness of developed system are evaluated on specially manufactured machine tool with open architecture CNC. The results of this research can be the model of remote monitoring and fault diagnosis system of machine tool with open architecture CNC.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.4
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• pp.265-269
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• 2009

Formal specification plays important roles in guaranteeing software safety of safety-critical systems such as nuclear power plant's digital control systems. We had developed a technique [1] which synthesizes Function Block Diagram(FBD) programs from NuSCR formal requirements specifications, but it did not be used widely as it had no automatic tool support. FBD is one of the programming languages for Programmable Logic Controllers(PLC) based system. This paper introduces a CASE tool, NuSCRtoFBD, developed to automate the synthesis procedure. The CASE tool NuSCRtoFBD can reduce a number of errors occurred in the process of manual FBD programming.

• Journal of the Korea Society for Simulation
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• v.25 no.4
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• pp.21-30
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• 2016

Recently manufacturing companies have used PLC control programs popularly for their automated production systems. Since the life cycle of production process is not so long, the change of the production lines occur frequently. Most of changes happen with modification of the position information and control process of the equipment. PLC control program is also modified based on the fundamental process. Therefore, to verify new PLC program by configuring virtual space according to real environment is needed. In this paper we show a logical modeling method, based on Timed-FSA useful for sequence control and dead-lock prevention. There is a problem wasting user's labor and time when defining a variety of states in a device. To overcome this problem, we propose an extended I-O model based on existing methods by adding a token concept of Petri Nets. Also we will show the usability of the extended I-O modeling through user study.

• Proceedings of the KIEE Conference
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• 1987.11a
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• pp.90-94
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• 1987

A structured user-friendly procedures which enable users to program in GRAFCET form directly from sequence specifications have been developed. Using these procedures, we can program the programmable logic controller (PLC) in sequential control and realize programming, debugging, and real-time monitoring. GRAFCET has many advantages like parallelism expression, so we can expect higher productivity and easier maintenance than boolean language or relay-ladder diagram specification when adapts them to PLC.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1260-1268
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• 2005

Ladder Diagram(LD) is the most extensively used among PLC standard language for the design of control system. But LD has the disadvantages for data processing and maintenance. On the other hand, the Sequential Function Chart(SFC) graphic language is very powerful for describing the sequential logic control algorithm. SFC is based on flow chart, so control flow understanding is very easy and divergence can possible improving its ability. In this paper, we propose the efficient management elevator system using the action qualifiers and choice divergence. From the result, we confirm the SFC language reduced program memory capacity and processing time is faster than LD language.