• Title/Summary/Keyword: PC communication language

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A study about factors influencing on internet advertising effects -Focus on consumer characteristics- (인터넷 의류광고 태도에 미치는 영향요인 연구 -소비자특성 중심으로-)

  • Ko, Eun-Ju;Mok, Bo-Kyoung
    • Journal of Global Scholars of Marketing Science
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    • v.7
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    • pp.283-302
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    • 2001
  • The purpose of this study was to examine the current situation about the internet usage and advertisement attitude, to investigate the relationship between consumer characteristics and internet advertising effect, and to identify the moderating effect of consumer characteristics on the relationship between advertising types and advertising effects. For the study, a sample of 152 apparel consumers participated in this survey research. The survey of design with a questionnaire was employed. Questionnaire was developed with the html language and data collection was done at Korea though the internet on October 2000. For data analysis, descriptive statistics (i.e., frequency, percent), ANOVA with duncan tests were used. First, the major place of using internet was found as home, company, school, PC room in order and the average time of using internet was found as three times weekly. The major purpose of using internet were information search, e-mail, PC communication and program-download. The experience of internet fashion advertising was high. Second, consumer characteristics(age, job) had significant effects on attitude to the product. 20 years-old age group and specialist group were found to influence on the higher attitude toward product. Third, main effects of consumer characteristics(age, job) were found to be significant. The correlation and interaction effects of consumer characteristics and internet advertisement types were not significant.

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Scene Composition Technology Based on HTML5 in Hybrid Broadcasting Environment (하이브리드 방송 환경 하에서 HTML5 기반 장면구성 기술)

  • Jo, Minwoo;Park, Jungwook;Kim, Kyuheon
    • Journal of Broadcast Engineering
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    • v.18 no.2
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    • pp.237-248
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    • 2013
  • Hybrid broadcasting environment is convergence of broadcasting and communication environment. In hybrid broadcasting environment, a number of media can be delivered using both broadcasting channel and other network unlike traditional broadcast environment that is able to deliver a couple of media by the limited bandwidth. Now, starting with smart TV, hybrid broadcasting environment combining broadcasting channel and IP network is established, and a variety of services are appearing. Moreover, the services using hybrid broadcasting environment are expected to appear soon for the other smart terminals such as smart phone and tablet PC. Scene composition is one of the methods that can consume effectively a number of media delivered from hybrid broadcasting environment. Using scene composition, multiple media can be consumed through the specified presentation time and space. Therefore, in this paper, it proposes the scene composition technology that is suitable for hybrid broadcasting environment and smart terminals. However, the spatial composition and temporal composition of media using script language and style language of HTML5 might increase the complexity of processing, and cause limitation of avaliable terminals. Also, a document of HTML5 can describe only one scene. By these reason, the proposed scene composition technology extends HTML5 in order to provide the spatial and temporal composition of media and description of multiple scene through markup language. In addition, it includes the extension of HTML5 in terms of utilization in hybrid broadcasting environment. For this proposal, this paper describes the technology of HTML5 and proposed scene composition. Also, it verifies the scene composition with both implementations and experiments.

A Realization of CNN-based FPGA Chip for AI (Artificial Intelligence) Applications (합성곱 신경망 기반의 인공지능 FPGA 칩 구현)

  • Young Yun
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2022.11a
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    • pp.388-389
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    • 2022
  • Recently, AI (Artificial Intelligence) has been applied to various technologies such as automatic driving, robot and smart communication. Currently, AI system is developed by software-based method using tensor flow, and GPU (Graphic Processing Unit) is employed for processing unit. However, if software-based method employing GPU is used for AI applications, there is a problem that we can not change the internal circuit of processing unit. In this method, if high-level jobs are required for AI system, we need high-performance GPU, therefore, we have to change GPU or graphic card to perform the jobs. In this work, we developed a CNN-based FPGA (Field Programmable Gate Array) chip to solve this problem.

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Design and Implementation of VoIP Equipment including Telephone Function for Home Gateway Connection (전화기 기능을 포함한 홈 게이트웨이 접속용 VOIP 장비 설계 및 구현)

  • Lee Yong-Soo;Jung Kwang-Wook;Chung Joong-Soo
    • The Journal of the Korea Contents Association
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    • v.4 no.4
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    • pp.123-131
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    • 2004
  • Internet is absolutely contributed to information technology revolution nowadays. Internet services such as voice and data, etc. are provided home or small office via home gateway. The development of communication equipment via home gateway is implemented rapidly, and its product various. This paper presents the design and implementation of the VoIP equipment including the telephone function based on the embedded environment and being connected to the home gateway and the PC because of taking 2-ethernet LAN ports. As developing environment, the STLC1502 developed at ST Microelectronics as single chip solution, VxWorks as RTOS, and C language as coding mechanism are used. The verification of the developed systems for the voice test is carried out for the gatekeeper via Internet. The performance parameter is considered as the call processing capacity measuring the time of the call setup and clearing, and the data processing capacity for the file transfer. As a call setup and clearing is about 95ms, the call processing capacity is about 10 calls per second. The data processing capacity is 5.7Mbps in case of file transfer of server and client environment. Therefore the performance result is satisfied in the aspect of the call processing time and the data transfer time in Internet.

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A 16 bit FPGA Microprocessor for Embedded Applications (실장제어 16 비트 FPGA 마이크로프로세서)

  • 차영호;조경연;최혁환
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.7
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    • pp.1332-1339
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    • 2001
  • SoC(System on Chip) technology is widely used in the field of embedded systems by providing high flexibility for a specific application domain. An important aspect of development any new embedded system is verification which usually requires lengthy software and hardware co-design. To reduce development cost of design effort, the instruction set of microprocessor must be suitable for a high level language compiler. And FPGA prototype system could be derived and tested for design verification. In this paper, we propose a 16 bit FPGA microprocessor, which is tentatively-named EISC16, based on an EISC(Extendable Instruction Set Computer) architecture for embedded applications. The proposed EISC16 has a 16 bit fixed length instruction set which has the short length offset and small immediate operand. A 16 bit offset and immediate operand could be extended using by an extension register and an extension flag. We developed a cross C/C++ compiler and development software of the EISC16 by porting GNU on an IBM-PC and SUN workstation and compared the object code size created after compiling a C/C. standard library, concluding that EISC16 exhibits a higher code density than existing 16 microprocessors. The proposed EISC16 requires approximately 6,000 gates when designed and synthesized with RTL level VHDL at Xilinix's Virtex XCV300 FPGA. And we design a test board which consists of EISC16 ROM, RAM, LED/LCD panel, periodic timer, input key pad and RS-232C controller. 11 works normally at 7MHz Clock.

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Sensitivity Identification Method for New Words of Social Media based on Naive Bayes Classification (나이브 베이즈 기반 소셜 미디어 상의 신조어 감성 판별 기법)

  • Kim, Jeong In;Park, Sang Jin;Kim, Hyoung Ju;Choi, Jun Ho;Kim, Han Il;Kim, Pan Koo
    • Smart Media Journal
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    • v.9 no.1
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    • pp.51-59
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    • 2020
  • From PC communication to the development of the internet, a new term has been coined on the social media, and the social media culture has been formed due to the spread of smart phones, and the newly coined word is becoming a culture. With the advent of social networking sites and smart phones serving as a bridge, the number of data has increased in real time. The use of new words can have many advantages, including the use of short sentences to solve the problems of various letter-limited messengers and reduce data. However, new words do not have a dictionary meaning and there are limitations and degradation of algorithms such as data mining. Therefore, in this paper, the opinion of the document is confirmed by collecting data through web crawling and extracting new words contained within the text data and establishing an emotional classification. The progress of the experiment is divided into three categories. First, a word collected by collecting a new word on the social media is subjected to learned of affirmative and negative. Next, to derive and verify emotional values using standard documents, TF-IDF is used to score noun sensibilities to enter the emotional values of the data. As with the new words, the classified emotional values are applied to verify that the emotions are classified in standard language documents. Finally, a combination of the newly coined words and standard emotional values is used to perform a comparative analysis of the technology of the instrument.

DEVELOPMENT OF THE READOUT CONTROLLER FOR INFRARED ARRAY (적외선검출기 READOUT CONTROLLER 개발)

  • Cho, Seoung-Hyun;Jin, Ho;Nam, Uk-Won;Cha, Sang-Mok;Lee, Sung-Ho;Yuk, In-Soo;Park, Young-Sik;Pak, Soo-Jong;Han, Won-Yong;Kim, Sung-Soo
    • Publications of The Korean Astronomical Society
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    • v.21 no.2
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    • pp.67-74
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    • 2006
  • We have developed a control electronics system for an infrared detector array of KASINICS (KASI Near Infrared Camera System), which is a new ground-based instrument of the Korea Astronomy and Space science Institute (KASI). Equipped with a $512{\times}512$ InSb array (ALADDIN III Quadrant, manufactured by Raytheon) sensitive from 1 to $5{\mu}m$, KASINICS will be used at J, H, Ks, and L-bands. The controller consists of DSP(Digital Signal Processor), Bias, Clock, and Video boards which are installed on a single VME-bus backplane. TMS320C6713DSP, FPGA(Field Programmable Gate Array), and 384-MB SDRAM(Synchronous Dynamic Random Access Memory) are included in the DSP board. DSP board manages entire electronics system, generates digital clock patterns and communicates with a PC using USB 2.0 interface. The clock patterns are downloaded from a PC and stored on the FPGA. UART is used for the communication with peripherals. Video board has 4 channel ADC which converts video signal into 16-bit digital numbers. Two video boards are installed on the controller for ALADDIN array. The Bias board provides 16 dc bias voltages and the Clock board has 15 clock channels. We have also coded a DSP firmware and a test version of control software in C-language. The controller is flexible enough to operate a wide range of IR array and CCD. Operational tests of the controller have been successfully finished using a test ROIC (Read-Out Integrated Circuit).

Design and Implementation of Visual Environment for Parallel Object-Oriented Programming (병렬 객체지향 프로그래밍을 위한 시각 환경의 설계 및 구현)

  • Choe, Suk-Yeong
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.2
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    • pp.485-496
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    • 1999
  • Comparing with sequential programming, parallel programming has additional complexity due to the consideration of parallelism, communication and synchronization of processes. A synergism between users and compliers should be established, each assisting the other to produce high quality parallel programs. On the above underlying philosophy, we developed a parallel Object-Oriented specification language, POOSL, as preliminary works. However, it is still likely to hard for users to write parallel program because users have to consider grammar of POOSL and to write text-based parallel program. It would be more desirable to provide users wit visual environment for effective parallel programming. Therefore, we propose a visual programming environment. VEPO(Visual environment for Parallel Object-Oriented Programming), based on POOSL in order that users can develop parallel programs more easily and conveniently. It aims at supporting a programming environment in which users can represent their programs more naturally and visually I parallel manner with object-oriented concept and essential steps during parallel program development such as program specification, compilation, execution and animation of execution are integrated. VEPO has useful features for parallel processing. Especially, complicated parallel codes for synchronization and communication of processes are automatically generated in the translation phase, so users can be relieved of writing error-prone parallel codes. The system is targeted to the transputer-based parallel system, MC-3. The graphic user interface of VEPO was implemented using Visual C++. Visual programs descirbed on VEPO are translated into Inmos C and executed on MC-3.

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