• Title/Summary/Keyword: P-Parallel

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THE OPTIMAL SEQUENTIAL AND PARALLEL ALGORITHMS TO COMPUTE ALL HINGE VERTICES ON INTERVAL GRAPHS

  • Bera, Debashis;Pal, Madhumangal;Pal, Tapan K.
    • Journal of applied mathematics & informatics
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    • v.8 no.2
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    • pp.387-401
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    • 2001
  • If the distance between two vertices becomes longer after the removal of a vertex u, then u is called a hinge vertex. In this paper, a linear time sequential algorithm is presented to find all hinge vertices of an interval graph. Also, a parallel algorithm is presented which takes O(n/P + log n) time using P processors on an EREW PRAM.

Parallel Implementation of Radon Transform on TMS320C80-based System (TMS320C80시스템에서 Radon 변환의 병렬 구현)

  • 송정호;성효경최흥문
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.727-730
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    • 1998
  • In this paper, we propose an implementation of an efficient parallel Radon transform on TMS320C80-based system. For an N$\times$N SAR image, we can obtain O(NM/p) of the conventional parallel Radon transform, by representing the projection patterns in Radon space variables instead of the image space variables, and pipelining the algorithm, where p is the number of processors and M is the number of projection angles. Also, we can reduce the time for the dynamic load distribution among the nodes and the communication overheads of accessing the global memories, by pipelining the memory and processing operations by using tripple buffer structure. Experimental results show an efficient parallel Radon transform of speedup Sp=3.9 and efficiency E=97.5% for 256$\times$256 image, when implemented on TMS320C80 composed of four parallel slave processors with three memory blocks.

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병렬분산 환경에서의 DEVS형식론의 시뮬레이션

  • Seong, Yeong-Rak;Jung, Sung-Hun;Kon, Tag-Gon;Park, Kyu-Ho-
    • Proceedings of the Korea Society for Simulation Conference
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    • 1992.10a
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    • pp.5-5
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    • 1992
  • The DEVS(discrete event system specification) formalism describes a discrete event system in a hierarchical, modular form. DEVSIM++ is C++ based general purpose DEVS abstract simulator which can simulate systems to be modeled by the DEVS formalism in a sequential environment. We implement P-DEVSIM++ which is a parallel version of DEVSIM++. In P-DEVSIM++, the external and internal event of models can be processed in parallel. To process in parallel, we introduce a hierarchical distributed simulation technique and some optimistic distributed simulation techniques. But in our algorithm, the rollback of a model is localized itself in contrast to the Time Warp approach. To evaluate its performance, we simulate a single bus multiprocessor architecture system with an external common memory. Simulation result shows that significant speedup is made possible with our algorithm in a parallel environment.

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An Implementation of the DEVS Formalism on a Parallel Distributed Environment (병렬 분산 환경에서의 DEVS 형식론의 구현)

  • 성영락
    • Journal of the Korea Society for Simulation
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    • v.1 no.1
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    • pp.64-76
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    • 1992
  • The DEVS(discrete event system specificaition) formalism specifies a discrete event system in a hierarchical, modular form. DEVSIM++ is a C++based general purpose DEVS abstract simulator which can simulate systems modeled by the DEVS formalism in a sequential environment. This paper describes P-DEVSIM++which is a parallel version of DEVSIM++ . In P-DEVSIM++, the external and internal event of DEVS models can by processed in parallel. For such processing, we propose a parallel, distributed optimistic simulation algorithm based on the Time Warp approach. However, the proposed algorithm localizes the rollback of a model within itself, not possible in the standard Time Warp approach. An advantage of such localization is that the simulation time may be reduced. To evaluate its performance, we simulate a single bus multiprocessor architecture system with an external common memory. Simulation result shows that significant speedup is made possible with our algorithm in a parallel environment.

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Parallel Preconditioner for the Domain Decomposition Method of the Discretized Navier-Stokes Equation (이산화된 Navier-Stokes 방정식의 영역분할법을 위한 병렬 예조건화)

  • Choi, Hyoung-Gwon;Yoo, Jung-Yul;Kang, Sung-Woo
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.27 no.6
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    • pp.753-765
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    • 2003
  • A finite element code for the numerical solution of the Navier-Stokes equation is parallelized by vertex-oriented domain decomposition. To accelerate the convergence of iterative solvers like conjugate gradient method, parallel block ILU, iterative block ILU, and distributed ILU methods are tested as parallel preconditioners. The effectiveness of the algorithms has been investigated when P1P1 finite element discretization is used for the parallel solution of the Navier-Stokes equation. Two-dimensional and three-dimensional Laplace equations are calculated to estimate the speedup of the preconditioners. Calculation domain is partitioned by one- and multi-dimensional partitioning methods in structured grid and by METIS library in unstructured grid. For the domain-decomposed parallel computation of the Navier-Stokes equation, we have solved three-dimensional lid-driven cavity and natural convection problems in a cube as benchmark problems using a parallelized fractional 4-step finite element method. The speedup for each parallel preconditioning method is to be compared using upto 64 processors.

Design of Web Based Parallel I/O Control System Using IEEE 1284 Operating Modes (IEEE 1284 동작 모드를 사용하는 웹 기반 병렬 I/O 제어 장치의 설계)

  • Chang, Ho-Sung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.3
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    • pp.991-996
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    • 2010
  • In this paper, we designed a parallel I/O control system using IEEE 1284 operating modes and implemented remote control communication under the internet environment. The IEEE 1284 standard defines an interface compatible with several distinct operation modes and brings higher performance to the PC parallel port. Therefore, parallel port devices become easier to configure and simplify interface because new operating systems bring PnP function to the parallel port with the Device/ID identification sequence. With these enhancements, the parallel port become an even better low-cost, readily available I/O port on the PC.

A Development of Parallel Processing for Power Flow analysis (전력 조류 계산의 병렬처리에 관한 연구)

  • Lee, Chun-Mo
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.51 no.2
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    • pp.55-59
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    • 2002
  • Parallel processing is able to be used effectively on computationally intense power system problems. But this technology is not still available is not only parallel computer but also parallel processing scheme. Testing these algorithms to ensure accuracy, and evaluation of their performance is also an issue. Although a significant amount of parallel algorithms of power system problem have been developed in last decade, actual testing on parallel computer architectures lies in the beginning stages because no clear cut paths. This paper presents Jacobian modeling method to supply the base being able to treat power flow by newton's method by the computer. This method is to assign and to compute teared blocks of sparse matrix at each parallel processors. The testing to insure accuracy of developed method have been done on serial computer by trying to simulate a parallel environment.

Design of a Serial-to-Parallel Converter Using GaAs pHEMT (GaAs pHEMT를 이용한 직-병렬변환기 설계)

  • Lee, Chang-Dae;Lee, Dong-Hyun;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.3
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    • pp.171-183
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    • 2018
  • Herein, we show the design and fabrication of a serial-to-parallel converter (SPC) using the $0.25-{\mu}m$ GaAs pHEMT process. The serial-to-parallel converter is composed of four bits to control the four phase shifters used in the core chip. The SPC stores the received serial data signal to a register in the SPC and converts the stored data into the parallel data. Each converted output data can control four phase shifters. The size of the fabricated SPC is $1,200{\times}480{\mu}m^2$ and it uses two DC power supplies of 5 V and -3 V. The consumption current of each DC power supply is 7.1 mA for 5 V, and 2.1 mA for -3 V.

Comparison of Meat Quality and Muscle Fiber Characteristics between Porcine Skeletal Muscles with Different Architectures

  • Park, Junyoung;Song, Sumin;Cheng, Huilin;Im, Choeun;Jung, Eun-Young;Moon, Sung Sil;Choi, Jungseok;Hur, Sun Jin;Joo, Seon-Tea;Kim, Gap-Don
    • Food Science of Animal Resources
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    • v.42 no.5
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    • pp.874-888
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    • 2022
  • This study aimed to compare the similarities, physicochemical properties, and muscle fiber characteristics of porcine skeletal muscles. Fourteen types of muscles were collected from nine pig carcasses at 24 h post-mortem and classified by muscle architecture into two main groups, namely parallel and pennate. The muscles were further differentiated into three subtypes per group. These included fan-shaped, fusiform, and strap for the parallel group, and unipennate, bipennate, and multipennate for the pennate group. Parallel-fibered muscles, which were composed of larger I, IIA, IIX, and IIXB fibers and a lower density of IIA fibers, showed higher redness and yellowness values than pennate-fibered muscles (p<0.05). However, the relative fiber area was not significantly different between the parallel and pennate groups (p>0.05). In the subtypes of parallel architecture, the strap group showed lower moisture content and higher redness values than the other subtypes and had considerably higher amounts of oxidative fibers (I and IIA; 72.3%) than the fan-shaped and fusiform groups (p<0.05). In the pennate group, unipennate showed comparatively lower moisture content and higher lightness than other pennate subtypes and was composed of smaller I, IIA, and IIX fibers than the bipennate and multipennate groups (p<0.05). Finally, a different trend of muscle clustering by hierarchical cluster analysis was found between physicochemical properties and muscle fiber characteristics. These results suggest that the physicochemical properties and muscle fiber characteristics of porcine skeletal muscles are not significantly dependent on morphological properties but are rather related to the intrinsic properties of the individual muscles.

A Parallel Processing System for Visual Media Applications (시각매체를 위한 병렬처리 시스템)

  • Lee, Hyung;Pakr, Jong-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.1A
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    • pp.80-88
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    • 2002
  • Visual media(image, graphic, and video) processing poses challenge from several perpectives, specifically from the point of view of real-time implementation and scalability. There have been several approaches to obtain speedups to meet the computing demands in multimedia processing ranging from media processors to special purpose implementations. A variety of parallel processing strategies are adopted in these implementations in order to achieve the required speedups. We have investigated a parallel processing system for improving the processing speed o f visual media related applications. The parallel processing system we proposed is similar to a pipelined memory stystem(MAMS). The multi-access memory system is made up of m memory modules and a memory controller to perform parallel memory access with a variety of combinations of 1${\times}$pq, pq${\times}$1, and p${\times}$q subarray, which improves both cost and complexity of control. Facial recognition, Phong shading, and automatic segmentation of moving object in image sequences are some that have been applied to the parallel processing system and resulted in faithful processing speed. This paper describes the parallel processing systems for the speedup and its utilization to three time-consuming applications.