• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.833-836
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• 1999

In this paper, a wideband MMIC LNA was designed using low Q matching network. Gains of 9.8~12.2 ㏈, and noise figures of 1.7~2.1 ㏈ were obtained from the fabricated wideband MMIC LNA in the frequency ranges of 1.5~2.5㎓. And maximum output power of 10.83 ㏈m were obtained at the center frequency of 2 ㎓. The chip size of the fabricated wideband MMIC low noise amplifier is 1.4 mm$\times$1.4 mm.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.12
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• pp.7-12
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• 2008

In this paper, a highly efficiency power amplifier is presented for multi-band antenna system. The class F power amplifier operating in dual-band designed with one LDMOSFET. An operating frequency of power amplifier is 900 MHz and 2.14 GHz respectively Matching networks and harmonic control circuits of amplifier are designed by using the unit cell of composite right/left-handed(CRLH) transmission line(TL) realized with lumped elements. The CRLH TL can lead to metamaterial transmission line with the dual-band holing capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Because the control of all harmonic components for high efficiency is very difficult, we have controled only the second- and third-harmonics to obtain the high efficiency with the CRLH TL. Also, the proposed power amplifier has been realized by using the harmonic control circuit for not only the output matching network, but also the input matching network for better efficiency.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1125-1128
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• 2003

This paper presents the design method of a Colpitts type oscillator with coplanar waveguide(CPW) structures in the range of Ka-band frequency for transmitter and receiver modules. Series short stubs of CPW patterns provide inductances and capacitances in the range of Ka-band which can be expressed as a CLC-$\pi$ equivalent circuit. The experimentation has employed ro4003 substrates as a CPW substrate which has a dielectric constant of 3.38 and a signal and ground space of 100um. A method of momentum simulation for the CPW patterns has performed with an ADS software tool of Hewlett-Packard Corp. Inductance and capacitance circuits of a Colpitts oscillator was interconnected to a MESFET with CPW bend structures of including the input and output impedance matching circuits of the active transistor. Circuit parameters for impedance matching were determined through the network conversion to the equivalent length of CPW transmission lines by using T-network 1 $\pi$-network conversion circuit. A Colpitts oscillator was fabricated on the substrate of a area of 8.5mm x 17.4mm with a MESFET of Fujitsu FMM5704X and CPW series short stubs. The design suggested the possibility of realizing oscillators on a planar surface for the wireless system of tansmitter and receiver modules in the frequency range of 30GHz

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.8
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• pp.610-618
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• 2017

This paper presents a 868/915 MHz CMOS RF transceiver for the ZigBee application. Using a switchless matching network, the off chip switch is removed to achieve the low cost RF transceiver, and by the elimination of the switch's insertion loss we can achieve the benefits for the RF receiver's noise figure and transmitter's power efficiency at the given output power. The receiver is composed of low-noise amplifier, mixer, and baseband analog(BBA) circuit. The transmitter is composed of BBA, mixer, and driver amplifier. And, the integer N type frequency synthesizer is designed. The proposed ZigBee RF full transceiver is implemented on the $0.18{\mu}m$ CMOS technology. Measurement results show that the maximum gain and the noise figure of the receiver are 97.6 dB and 6.8 dB, respectively. The receiver consumes 32 mA in the receiver mode and the transmitter 33 mA in the transmission mode.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.2
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• pp.85-89
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• 2011

In this paper, a novel Class-E power amplifier using metamaterials has been realized with one RF LDMOS diffusion metal-oxide-semiconductor field effect transistor. The CRLH structure can lead to metamaterial transmission line with the Class-E power amplifier tuning capability. The CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Also, the proposed power amplifier has been realized by using the CRLH structure in the output matching network for better efficiency. Operating frequencies are chosen at 13.56 MHz in this work. The measured results show that the output power of 39.83 dBm and the gain of 11.83dB was obtained. At this point, we have obtained the power-added efficiency (PAE) of 73 % at operation frequency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.9
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• pp.54-58
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• 2011

In this paper a dual-band Class-E power amplifier using Composite Right-/Left-Handed transmission lines and PIN diode is proposed. Dual-band operation is achieved by the frequency offset and nonlinear phase slope of CRLH TL for the matching network of power amplifiers. The proposed power amplifier has been realized by using in the input and the output matching network for high power added efficiency. PIN diode has been used to obtain the dual-band of power amplifier. The measured results show that output powers of 42.17 dBm and 41.43 dBm were obtained at 800 MHz and 1900 MHz, respectively. At this frequency, we have obtained the power-added efficiency(PAE) of 67.84 % and 65.31 % in two operation frequencies, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.11
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• pp.834-841
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• 2018

A power amplifier for subgigahertz short-range wireless communication using $0.18-{\mu}m$ CMOS technology is presented. It is designed as a differential structure to form easily a virtual ground node, to increase output power, and to design a cascode structure to prevent breakdown. The transistor gate width was determined to maximize the output power and power-added efficiency(PAE), and the balun was optimized through electromagnetic simulation to minimize the loss caused by the matching network. This power amplifier had a gain of more than 49.5 dB, a saturation power of 26.7 dBm, a peak PAE of 20.7 % in the frequency range of 860 to 960 MHz, and a chip size of $2.14mm^2$.

• ETRI Journal
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• v.36 no.2
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• pp.214-223
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• 2014

A fully-integrated penta-band reconfigurable power amplifier (PA) is developed for handset Tx applications. The output structure of the proposed PA is composed of the fixed output matching network, power and frequency reconfigurable networks, and post-PA distribution switches. In this work, a new reconfiguration technique is proposed for a specific band requiring power and frequency reconfiguration simultaneously. The design parameters for the proposed reconfiguration are newly derived and applied to the PA. To reduce the module size, the switches of reconfigurable output networks and post-PA switches are integrated into a single IC using a $0.18{\mu}m$ silicon-on-insulator CMOS process, and a compact size of $5mm{\times}5mm$ is thus achieved. The fabricated W-CDMA PA module shows adjacent channel leakage ratios better than -39 dBc up to the rated linear power and power-added efficiencies of higher than around 38% at the maximum linear output power over all the bands. Efficiency degradation is limited to 2.5% to 3% compared to the single-band reference PA.

• Journal of electromagnetic engineering and science
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• v.17 no.4
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• pp.221-227
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• 2017

A new approach to designing a broadband and highly efficient class-E power amplifier based on nonlinear shunt capacitance analysis is proposed. The nonlinear shunt capacitance method accurately extracts optimum class-E power amplifier parameters, including an external shunt capacitance and an output impedance, at different frequencies. The dependence of the former parameter on the frequency is considered to select an optimal value of external shunt capacitor. Then, upon determining the latter parameter, an output matching network is optimized to obtain the highest efficiency across the bandwidth of interest. An analytical approach is presented to design the broadband class-E power amplifier of a MOSFET transistor. The proposed method is experimentally verified by a 140-170 MHz class-E power amplifier design with maximum added power efficiency of 82% and output power of 34 dBm.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.3
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• pp.649-657
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• 2008

This paper describes the optimized output performances such as output power and the third order intermodulation in GaN high power transistor packages which consist of chip die, chip capacitors, and wire bonding. The optimized output power according to wire bonding techniques, and third order intermodulation performances according to wire bonding and bias conditions are discussed. In addition, it is shown through the nonlinear simulation that how the output performances are sensitive to the inductance values which are realized by wire bonding for matching network in the limited package area.