• Title/Summary/Keyword: Optimized Path

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The Study on the Optimized Earthwork Transfer Path Algorithm Considering the Precluded Area of Massive Cutting and Banking (대규모 절성토 지역의 제척지를 고려한 최적화된 토량이동 경로 알고리즘 개발에 관한 연구)

  • Kang, Tae-Wook;Cho, Yoon-Ho
    • International Journal of Highway Engineering
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    • v.13 no.4
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    • pp.1-8
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    • 2011
  • The purpose of this study is to suggest the optimized transfer algorithm of earthwork considering the precluded area such as the lake, bogs. The earthwork transfer plan in massive cutting and banking should be established because of affecting the construction cost highly. Until now, there was the study about the optimized earthwork transfer model considering the OR(Operating Research). but isn't the study about the model considering the precluded area such as the lake, bogs. In most cases, the engineer adjusts the earthwork transfer path considering the precluded area, manually. The presented model suggests to calculate various visibility paths with $A^*$algorithm after converting the precluded area to polygon topology. By using this paths, the minimum cost path to optimize the earthwork transfer can be obtained. In this study, the validity of the model was proved as implementing the system for the optimized earthwork transfer considering the precluded area.

Path planning method for mobile robot (이동 Robot를 위한 경로계획법)

  • 범희락;조형석
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10a
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    • pp.722-725
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    • 1990
  • This paper proposes a new path planning method for obstacle avoidance of mobile robot. In order to achieve easy planning of the path, a simple representation of the empty space is achieved based on thinning algorithm. The proposed Planning technique facilitates the direct use of information obtained by camera. Comparing to the V-graph method, the task of determining the shortest path from the resulting skeleton of empty space is optimized in terms of number of computation steps. The usefulness of the proposed method is ascertained by simulation.

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Path Planning of Autonomous Mobile Robot Based on Fuzzy Logic Control (퍼지로직을 이용한 자율이동로봇의 최적경로계획)

  • Park, Jong-Hun;Lee, Jae-Kwang;Huh, Uk-Youl
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2420-2422
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    • 2003
  • In this paper, two Fuzzy Logics for path planning of an autonomous mobile robot are proposed. If a target point is given, such problems regarding the velocity and object recognition are closely related with path to which the mobile robot navigates. Therefore, to ensure safety navigation of the mobile robot for two fuzzy logic parts, path planning considering the surrounding environment was performed in this paper. First, feature points for local and global path are determined by utilizing Cell Decomposition off-line computation. Second, the on-line robot using two Fuzzy Logics navigates around path when it tracks the feature points. We demonstrated optimized path planning only for local path using object recognition fuzzy logic corresponds to domestic situation. Furthermore, when navigating, the robot uses fuzzy logic for velocity and target angle. The proposed algorithms for path planning has been implemented and tested with pioneer-dxe mobile robot.

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Optimized Path Finding Algorithm for Walking Convenience of the People with Reduced Mobility (교통약자의 이동편의를 위한 최적경로 탐색 기법)

  • Moon, Mikyeong;Lee, Youngmin;Yu, Kiyun;Kim, Jiyoung
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.34 no.3
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    • pp.273-282
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    • 2016
  • There has been growing social interest recently in the movement rights of people with reduced mobility. However, it simply eliminates the temporary inconvenience of walking of people with reduced mobility because it focuses only on supply of institutional facilities. Therefore, we look forward to improving movement welfare by proposing an optimized path finding algorithm for people with reduced mobility that takes into consideration physical elements affecting their movement, such as slope, steps etc. We selected Walking barrier factor by analyzing previous studies and calculated the relative importance of Walking barrier factors using an Analytic Hierarchy Process(AHP). Next, through the fuzzy system, the Walking disturbance level of link, which integrates the weights of Walking barrier factors and the attributes of each link, is derived. Then, Walking path cost that takes into consideration the ‘length’ factors is calculated and an optimized path for people with reduced mobility is searched using Dijkstra’s Algorithm. Nineteen different paths were searched and we confirmed that the derived paths are meaningful in terms of improving the mobility of people with reduced mobility by conducting a field test. We look forward to improving movement welfare by providing a navigation service using the path finding algorithm proposed in this study.

The Impact of Delay Optimization on Delay fault Testing Quality

  • Park, Young-Ho;Park, Eun-Sei
    • Journal of Electrical Engineering and information Science
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    • v.2 no.3
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    • pp.14-21
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    • 1997
  • In delay-optimized designs, timing failures due to manufacturing delay defects are more likely to occur because the average timing slacks of paths decrease and the system becomes more sensitive to smaller delay defect sizes. In this paper, the impact of delay optimized logic circuits on delay fault testing will be discussed and compared to the case for non-optimized designs. First, we provide a timing optimization procedure and show that the resultant density function of path delays is a delta function. Next we also discuss the impact of timing optimization on the yield of a manufacturing process and the defect level for delay faults. Finally, we will give some recommendations on the determination of the system clock time so that the delay-optimized design will have the same manufacturing yield as the non-optimized design and on the determination of delay fault coverage in the delay-optimized design in order to have the same defect-level for delay faults as the non-optimized design, while the system clock time is the same for both designs.

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Performance Evaluation of Short-cut Tunneling Schemes in Optimized Path Method over Mobile IP Networks (이동 IP의 최적경로 방식에서 단거리 터널링 기법의 성능평가)

  • 변태영;이경훈
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.1
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    • pp.65-73
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    • 2004
  • In this paper, we propose a tunnel establishment scheme using Next Hop Resolution Protocol over mobile IP networks, which consist of LAN-based IP networks and ATM-based IP networks. As a basic idea, we use the shortest path algorithm to establish a short-cut tunnel between HA and FA. Also, we classify methods for establishing a short-cut tunnel into four cases considering the locations of HA, FA, CN and MN. To confirm the advantages of our schemes, which deliver packets using short-cut tunnel in optimized path method over mobile IP networks, we performed mathematical analysis and simulation, compared proposed schemes with existing IP routing method in terms of transmission delay between CN and MN. The simulation results show that our scheme have superior performance to that of existing IP routing mechanism, because the store-and-forward delay which occurred in IP routing mechanism is considerably reduced in short-cut tunnel over ATM networks.

Path-smoothing for a robot arm manipulator using a Gaussian process

  • Park, So-Youn;Lee, Ju-Jang
    • Journal of the Korean Society of Industry Convergence
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    • v.18 no.4
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    • pp.191-196
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    • 2015
  • In this paper, we present a path-smoothing algorithm for a robot arm manipulator that finds the path using a joint space-based rapidly-exploring random tree. Unlike other smoothing algorithms which require complex mathematical computation, the proposed path-smoothing algorithm is done using a Gaussian process. To find the optimal hyperparameters of the Gaussian process, we use differential evolution hybridized with opposition-based learning. The simulation result indicates that the Gaussian process whose hyperparameters were optimized by hybrid differential evolution successfully smoothed the path generated by the joint space-based rapidly-exploring random tree.

DEVS-based Digital Twin Simulation Environment Modeling for Alternative Route Selection in Emergency Situations of Unnamed Aerial Vehicles (무인비행체의 유사시 대안 경로 선택을 위한 DEVS 기반 디지털 트윈 시뮬레이션 환경 모델링)

  • Kwon, Bo Seung;Jung, Sang Won;Noh, Young Dan;Lee, Jong Sik;Han, Young Shin
    • Journal of Korea Multimedia Society
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    • v.25 no.8
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    • pp.1007-1021
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    • 2022
  • Autonomous driving of unmanned aerial vehicles may have to pay expensive cost to create and switch new routes if unexpected obstacles exist or local map updates occured by the control system due to incorrect route information. Integrating digital twins into the path-following process requires more computing resources to quickly switch the wrong path to an alternative path, but it can quickly update the path during flight. In this study, we design a DEVS-based simulation environment which can modify optimized paths through short-term simulation of multi-virtual UAVs for applying digital twin concepts to path follow. Through simulation, we confirmed the possibility of increasing the mission stability of UAV.

Clock period optimaization by gate sizing and path sensitization (게미트 사이징과 감작 경로를 이용한 클럭 주기 최적화 기법)

  • 김주호
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.1
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    • pp.1-9
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    • 1998
  • In the circuit model that outputs are latched and input vectors are successively applied at inputs, the gate resizing approach to reduce the delay of the critical pathe may not improve the performance. Since the clock period is etermined by delays of both long and short paths in combinational circuits, the performance (clock period) can be optimized by decreasing the delay of the longest path, or increasing the delay of the shortest path. In order to achieve the desired clock period of a circuit, gates lying in sensitizable long and short paths can be selected for resizing. However, the gate selection in path sensitization approach is a difficult problem due to the fact that resizing a gate in shortest path may change the longest sensitizable path and viceversa. For feasible settings of the clock period, new algorithms and corresponding gate selection methods for resizing are proposed in this paper. Our new gate selection methods prevent the delay of the longest path from increasing while resizing a gate in the shortest path and prevent the delay of the shortest path from decreasing while resizing a gate in the longest sensitizable path. As a result, each resizing step is guaranteed not to increase the clock period. Our algorithmsare teted on ISCAS85 benchmark circuits and experimental results show that the clock period can beoptimized efficiently with out gate selection methods.

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