• Journal of Practical Engineering Education
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• v.13 no.2
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• pp.233-242
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• 2021

In this paper, as a liberal arts course for non-majors, we proposed a supervised learning artificial neural network parameter optimization method and a basic education method for activation function to design a basic artificial neural network subject curriculum. For this, a method of finding a parameter optimization solution in a spreadsheet without programming was applied. Through this training method, you can focus on the basic principles of artificial neural network operation and implementation. And, it is possible to increase the interest and educational effect of non-majors through the visualized data of the spreadsheet. The proposed contents consisted of artificial neurons with sigmoid and ReLU activation functions, supervised learning data generation, supervised learning artificial neural network configuration and parameter optimization, supervised learning artificial neural network implementation and performance analysis using spreadsheets, and education satisfaction analysis. In this paper, considering the optimization of negative parameters for the sigmoid neural network and the ReLU neuron artificial neural network, we propose a training method for the four performance analysis results on the parameter optimization of the artificial neural network, and conduct a training satisfaction analysis.

• Journal of the Korean Operations Research and Management Science Society
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• v.9 no.2
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• pp.46-55
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• 1984

The purpose of this parer is to provide a survey of the state of the art of routing methods in store-and-forward computer networks. The survey is carried out in line with a new taxonomy： heuristic methods, user-optimization methods, and system-optimization methods. This taxonomy on routing algorithms is based on two viewpoints： the level of optimization and the relative difficulty for the implementation in real computer networks. Some actual methods implemented in real computer networks are surveyed as well as the theoretical studies in the literature. This paper concludes with some points in need of further researches.

• Journal of applied mathematics & informatics
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• v.16 no.1_2
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• pp.91-104
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• 2004

A modification of the gradient method of convex programming is introduced. Also, we describe symbolic implementation of the gradient method and its modification by means of the programming language MATHEMATICA. A few numerical examples are reported.

• The Journal of the Acoustical Society of Korea
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• v.25 no.4E
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• pp.137-141
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• 2006

This paper presents HE-AAC decoder optimization on TMS320C55x fixed-point DSP core using a DSP-C like FFR code, which provides fast and flexible porting to a DSP core. Our optimization efforts are focused on methodologies that include general optimization methods of FFR code suitable for general DSP or RISC platform in high-level language and software optimization methods in assembly language level. The implementation result requires 48 MIPS and 135 Kbytes memory space to decode 48 Kbps stereo using real Korean S-DMB data.

• Korean Management Science Review
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• v.15 no.1
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• pp.1-12
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• 1998

This paper discusses a new algorithm, the PAPANET (Pivot And Probe Algorithm for NETwork optimization), for solving linear, capacitated linear network flow problem (NPs), PAPANET is a variation and specialization of the Pivot And Probe Algorithm (PAPA) developed by Sethi and Thompson, published in 1983-1984. PAPANET first solves an initial relaxed NP (RNP) with all the nodes from the original problem and a limited set of arcs (possibly all the artificial and slack arcs). From the arcs not considered in the current relaxation, we PROBE to identify candidate arcs that violate the current solution's dual constraints maximally. Candidate arcs are added to the RNP, and this new RNP is solved to optimality. This candidate pricing procedure and pivoting continue until all the candidate arcs price unfavorably and all of the dual constraints corresponding to the other, so-called noncandidate arcs, are satisfied. The implementation of PAPANET requires significantly fewer arcs and less solution CPU time than is required by the standard network simplex method implementation upon which it is based. Computational tests on randomly generated NPs indicate that our PAPANET implementation requires up to 40-50% fewer pivots and 30-40% less solution CPU time than is required by the comparable standard network simplex implementation from which it is derived.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.6
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• pp.1035-1043
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• 2022

With the spread of the Internet of Things (IoT), cloud computing, and big data, the need for high-speed encryption for applications is emerging. GPU optimization can be used to validate cryptographic analysis results or reduced versions theoretically obtained by the GPU in a reasonable time. In this paper, PIPO lightweight encryption implemented in various environments was implemented on GPU. Optimally implemented considering the brute force attack on PIPO. In particular, the optimization implementation applying the bit slicing technique and the GPU elements were used as much as possible. As a result, the implementation of the proposed method showed a throughput of about 19.5 billion per second in the RTX 3060 environment, achieving a throughput of about 122 times higher than that of the previous study.

• The Journal of the Acoustical Society of Korea
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• v.21 no.7
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• pp.648-655
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• 2002

This paper describes implementation of a multi-channel G.723.1 Annex A (G.723.1A) focused on code optimization using a high performance general purpose Digital Signal Processor (DSP), To implement a multi-channel G.723.1A functional complexities of the ITU-T G.723.1A fixed-point C-code are measures an analyzed. Then we sort and optimize C functions in complexity order. In parallel with optimization, we verify the bit-exactness of the optimized code using the ITU-T test vectors. Using only internal memory, the optimized code can perform full-duplex 17 channel processing. In addition, we further increase the number of available channels per DSP into 22 using fast codebook search algorithms, referred to as bit -compatible optimization.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.1 no.2
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• pp.91-98
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• 2008

Domestic standard for Korean T-DMB includes MPEG-4 BSAC (Bit Sliced Arithmetic Coding) audio coding that has been established in 2003. This paper presents an implementation and optimization of MPEG-4 BSAC Audio Decoder on ARM926EJ-S processor. Tools and modules of the BSAC audio decoder were implemented with 32-bit fixed point operations. Further optimization was accomplished using ARM926EJ-S Inline Assembly. The optimization was based on the total number of multiplications and MAC (Multiply and Accumulation) operations causing most of core cycles of ARM926EJ-S, and also based on analysis of ARMv5 instructions. The result of optimization was evaluated on the basis of MIPS (Million Instruction per second). Implementation results show that BSAC bitstream at 96kbps can be decoded in real-time at 65MHz CPU clocks.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2012.05a
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• pp.605-606
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• 2012

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1991.10a
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• pp.23-23
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• 1991