• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.9
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• pp.302-307
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• 2016

The technology of multistage deep drawing has been widely applied in the metal forming industry, in order to reduce both the manufacturing cost and time. A battery can used for mobile phone production is a well-known example of multistage deep drawing. It is very difficult to manufacture a battery can, however, because of its large thickness to height aspect ratio. Furthermore, the production of the final parts may result in assembly failure due to springback after multistage deep drawing. In industry, empirical methods such as over bending, corner setting and ironing have been used to reduce springback. In this study, a bottoming approach using the finite element method is proposed as a practical and scientific method of reducing springback. Bottoming induces compression stress in the deformed blank at the final stroke of the punch and, thus, has the effect of reducing springback. Different cases of the bottoming process are studied using the finite element program, DYNAFORM, to determine the optimal die design. The results of the springback simulation after bottoming were found to be in good agreement with the experimental results. In conclusion, the proposed bottoming method is expected to be widely used as a practical method of reducing springback in industry.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.6
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• pp.395-399
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• 2017

The LPI fuel filter housings used in automobiles were made from conventional die castings but have recently been developed by cold forging to improve the weight and durability. On the other hand, a sink may develop at the core of the forged product due to the resulting T-shape, which not only reduces the aesthetics, but also increases the post-processing cost of the product. Therefore, this research focused on methods to predict and mitigate sink development and progression during the T-shape forging process. Finite element analysis of the forging process was first performed to determine the optimal initial workpiece devoid of burrs and underfills. An accurate sink prediction was then obtained via metal flow analysis, which was a result of the finite element simulation. Through finite element analysis, it was confirmed that sink development is a product of the differences in nodal velocities arising from the T-shaped forging process. Consequently, a pad was inserted beneath the sink to minimize these velocity differences. The results yielded significant improvement with regard to the sink defect. This method was practically applied to an industrial site to validate the sink improvement.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.4
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• pp.175-182
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• 2017

In light emitting diode (LED) chip packaging, wire bonding is an important process that connects the LED chip on the lead frame pad with the Au wire and enables electrical operation for the next process. The wire bonding process is divided by two types: thermo compression bonding and ultrasonic bonding. Generally, the wire bonding process consists of three steps: 1st ball bonding that bonds the shape of the ball on the LED chip electrode, looping process that hangs the wire toward another connecting part with a loop shape, and 2nd stitch bonding that forms and bonds to another electrode. This study analyzed the factors affecting the LED die bonding processes to optimize the process capability that bonds a small Zener diode chip on the PLCC (plastic-leaded chip-carrier) LED package frame, and then applied response surface analysis. The design of experiment (DOE) was established considering the five factors, three levels, and four responses by analyzing the factors. As a result, the optimal conditions that meet all the response targets can be derived.

• Design & Manufacturing
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• v.17 no.1
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• pp.20-26
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• 2023

Lab-on-a-disc is a circular disc shape of cartridge that can be used for blood-based liquid biopsy to diagnose an early stage of cancer. Currently, liquid biopsies are regarded as a time-consuming process, and require sophisticated skills to precisely separate cell-free DNA (cfDNA) and circulating tumor cells (CTCs) floating in the bloodstream for accurate diagnosis. However, by applying the lab-on-a-disc to liquid biopsy, the entire process can be operated automatically. To do so, the lab-on-a-disc should be designed to prevent blood leakage during the centrifugation, transport, and dilution of blood inside the lab-on-a-disc in the process of liquid biopsy. In this study, the main components of lab-on-a-disc for liquid biopsy are fabricated by injection molding for mass production, and ultrasonic welding is employed to ensure the bonding strength between the components. To guarantee accurate ultrasonic welding, the flatness of the components is optimized numerically by using the response surface methodology with four main injection molding processing parameters, including the mold & resin temperatures, the injection speed, and the packing pressure. The 27 times finite element analyses using Moldflow® reveal that the injection time and the packing pressure are the critical factors affecting the flatness of the components with an optimal set of values for all four processing parameters. To further improve the flatness of the lab-on-a-disc components for stable mass production, a quarter-disc shape of lab-on-a-disc with a radius of 75 mm is used instead of a full circular shape of the disc, and this significantly decreases the standard deviation of flatness to 30% due to the reduced overall length of the injection molded components by one-half. Moreover, it is also beneficial to use a quarter disc shape to manage the deviation of flatness under 3 sigma limits.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.49-60
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• 2010

Semiconductor packages are increasingly moving toward miniaturization, lighter and high performance. Futhermore, packages become thinner. Thin packages will generate serious reliability problems such as warpage, crack and other failures. Reliability problems are mainly caused by the CTE mismatch of various package materials. Therefore, proper selection of the package materials and geometrical optimization is very important for controlling the warpage and the stress of the package. In this study, we investigated the characteristics of the warpage and the stress of several packages currently used in mobile devices such as CABGA, fcSCP, SCSP, and MCP. Warpage and stress distribution are analyzed by the finite element simulation. Key material properties which affect the warpage of package are investigated such as the elastic moduli, CTEs of EMC molding and the substrate. Geometrical effects are also investigated including the thickness or size of EMC molding, silicon die and substrate. The simulation results indicate that the most influential factors on warpage are EMC molding thickness, CTE of EMC, elastic modulus of the substrate. Simulation results show that warpage is the largest for SCSP. In order to reduce the warpage, DOE optimization is performed, and the optimization results show that warpage of SCSP becomes $10{\mu}m$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.126-142
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• 2016

This paper presents a wide-frequency-range, low-power transceiver with an automatic impedance-matching calibration for TV-white-space (TVWS) application. The wide-range automatic impedance matching calibration (AIMC) is proposed for the Drive Amplifier (DA) and LNA. The optimal $S_{22}$ and $S_{11}$ matching capacitances are selected in the DA and LNA, respectively. Also, the Single Pole Double Throw (SPDT) switch is integrated to share the antenna and matching network between the transmitter and receiver, thereby minimizing the systemic cost. An N-path filter is proposed to reject the large interferers in the TVWS frequency band. The current-driven mixer with a 25% duty LO generator is designed to achieve the high-gain and low-noise figures; also, the frequency synthesizer is designed to generate the wide-range LO signals, and it is used to implement the FSK modulation with a programmable loop bandwidth for multi-rate communication. The TVWS transceiver is implemented in $0.13{\mu}m$, 1-poly, 6-metal CMOS technology. The die area of the transceiver is $4mm{\times}3mm$. The power consumption levels of the transmitter and receiver are 64.35 mW and 39.8 mW, respectively, when the output-power level of the transmitter is +10 dBm at a supply voltage of 3.3 V. The phase noise of the PLL output at Band 2 is -128.3 dBc/Hz with a 1 MHz offset.