• 제목/요약/키워드: Operation Scheme

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Exploration on Reform of Railway Transportation Management System Based on Separating Train Operation with Rail Equipment Management

  • Yu, Jie-Min
    • Proceedings of the KOR-KST Conference
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    • 1998.09a
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    • pp.36-42
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    • 1998
  • This article analyzes Chinese railways transportation management system, uses the experiences of other countries' railway transportation management system for reference, as well as discusses the necessity of reform of railway transportation management system based on separating train operation with rail equipment management. Moreover, the article also puts forward an imagination on the reform scheme of railway transportation management system based on separating train operation with rail equipment management.

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A Hetero-Mirroring Scheme to Improve I/O Performance of High-Speed Hybrid Storage (고속 하이브리드 저장장치의 입출력 성능개선을 위한 헤테로-미러링 기법)

  • Byun, Si-Woo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.12
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    • pp.4997-5006
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    • 2010
  • A flash-memory-based SSDs(Solid State Disks) are one of the best media to support portable and desktop computers' storage devices. Their features include non-volatility, low power consumption, and fast access time for read operations, which are sufficient to present flash memories as major database storage components for desktop and server computers. However, we need to improve traditional storage management schemes based on HDD(Hard Disk Drive) and RAID(Redundant array of independent disks) due to the relatively slow or freezing characteristics of write operations of SSDs, as compared to fast read operations. In order to achieve this goal, we propose a new storage management scheme called Hetero-Mirroring based on traditional HDD mirroring scheme. Hetero-Mirroring-based scheme improves RAID-1 operation performance by balancing write-workloads and delaying write operations to avoid SSD freezing. Our test results show that our scheme significantly reduces the write operation overheads and freezing overheads, and improves the performance of traditional SSD-RAID-1 scheme by 18 percent, and the response time of the scheme by 38 percent.

A Performance Comparison of Flooding Schemes in Wireless Sensor Networks (무선센서네트워크에서 플러딩 기법의 성능평가)

  • Kim, Kwan-Woong;Cho, Juphil
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.6
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    • pp.153-158
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    • 2016
  • Broadcasting in multi-hop wireless sensor networks is a basic operation that supports many applications such as route search, setting up addresses and sending messages from the sink to sensor nodes. The broadcasting using flooding causes problems that can be mentioned as a broadcasting storm such as redundancy, contention and collision. A variety of broadcasting schemes using wireless sensor networks have been proposed to achieve superior performance rather than simple flooding scheme. Broadcasting algorithms in wireless sensor networks can be classified into six subcategories: flooding scheme, probabilistic scheme, counter-based scheme, distance-based scheme, location-based schemes, and neighbor knowledge-based scheme. This study analyzes a simple flooding scheme, probabilistic scheme, counter-based scheme, distance-based scheme, and neighbor knowledge-based scheme, and compares the performance and efficiency of each scheme through network simulation.

Algorithm of intelligent SPS with applying fast-valving and braking resistor (Fast-valving과 Braking resistor 적용을 통한 지능형 SPS 알고리즘 구현)

  • Kim, Kab-Yong;Yoon, Dong-Hee;Jang, Gil-Soo;Moon, Young-Hwan;Kim, Seog-Joo;Seo, Sang-Soo
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.280-281
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    • 2011
  • Special Protection Scheme(SPS) that operates scenarios about faults beyond the normally protective action is wide system protection technology for the purpose of wide areas protection. Therefore, the SPS focuses on the improvement of the power supply capability by protecting the system rather than protecting the system equipments. Since the SPS requires emergency operation, the operation schedule is set up in advance by analyzing various scenarios. Since the SPS's action scheme uses generator tripping and is a classical method it is presently the most powerful one. However, as the setting of SPS is set to the most severe disturbance, the scheme tends to trip more generators than required to prevent fault propagation. It is highly likely that tripping generator units to prevent fault propagation would result in difficulty of system management and possibility of load shedding. Accordingly, it is desirable that generators are connected to the system within the range that ensures system stability and intelligent SPS is currently under development to solve the problem being stated. In this paper, as a part of developing the intelligent SPS, application of the fast-valving and braking resistor scheme to the generators is being proposed and analysed to reduce the number of tripped generators.

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Sensorless Speed Control and Starting Algorithm using Current Control of SPM Synchronous Motor (영구자석 표면부착형 동기전동기의 전류제어기를 이용한 센서리스 기동방법 및 속도제어)

  • Baik, In-Cheol;Lee, Ju-Suk;Kim, Hag-Wone
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.6
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    • pp.523-529
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    • 2013
  • A sensorless speed control of a permanent magnet synchronous motor(PMSM) which utilizes MRAS based scheme to estimate rotor speed and position is presented. Considering an error between real and estimated rotor position values, a state equation of PMSM in the synchronous d-q reference frame is represented. A state equation of model system which uses estimated speed and nominal parameter values is expressed. To minimize the errors between the derivatives of d-q axis currents of real and model system, MRAS based adaptation mechanisms for the estimation of rotor speed and position are derived. On the other hand, for the acceleration stage of motor just before the sensorless operation, an acceleration scheme using only d-axis current control is proposed. To show the validity of the proposed scheme, experimental works are carried out and evaluated. During acceleration stage, the acceleration scheme using only d-axis current command shows good acceleration performance and controlled current level. For the sensorless operation, at low speed (5% of rated speed), a good performance is observed.

A Wire-overhead-free Reset Propagation Scheme for Millimeter-scale Sensor Systems

  • Lee, Inhee;Bang, Suyoung;Kim, Yejoong;Kim, Gyouho;Sylvester, Dennis;Blaauw, David;Lee, Yoonmyung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.4
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    • pp.524-533
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    • 2017
  • This paper presents a novel reset scheme for mm-scale sensing systems with stringent volume and area constraints. In such systems, multi-layer structure is required to maximize the silicon area per volume and minimize the system size. The multi-layer structure requires wirebonding connections for power delivery and communication among layers, but the area overhead for wirebonding pads can be significant. The proposed reset scheme exploits already existing power wires and thus does not require additional wires for system-wide reset operation. To implement the proposed reset scheme, a power management unit is designed to impose reset condition, and a reset detector is designed to interpret the reset condition indicated by the power wires. The reset detector uses a coupling capacitor for the initial power-up and a feedback path to hold the developed supply voltage. The prototype reset detector is fabricated in a $180-{\mu}m$ CMOS process, and the measurement results with the prototype mm-scale system confirmed robust reset operation over a wide range of temperatures and voltages.

Register-Based Parallel Pipelined Scheme for Synchronous DRAM (동기식 기억소자를 위한 레지스터를 이용한 병렬 파이프라인 방식)

  • Song, Ho Jun
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.12
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    • pp.108-114
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    • 1995
  • Recently, along wtih the advance of high-performance system, synchronous DRAM's (SDRAM's) which provide consecutive data output synchronized with an external clock signal, have been reported. However, in the conventional SDRAM's which utilize a multi-stage serial pipelined scheme, the column path is divided into multi-stages depending on CAS latency N. Thus, as the operating speed and CAS latency increase, new stages must be added, thereby causing a large area penalty due to additinal latches and I/O lines. In the proposed register-based parallel pipelined scheme, (N-1) registers are located between the read data bus line pair and the data output buffer and the coming data are sequentially stored. Since the column data path is not divided and the read data is directly transmitted to the registers, the busrt read operation can easily be achieved at higher frequencies without a large area penalty and degradation of internal timing margin. Simulation results for 0.32um-Tech. 4-Bank 64M SDRAM show good operation at 200MHz and an area increment is less than 0.1% when CAS latency N is increased from 3 to 4.. This pipelined scheme is more advantageous as the operating frequency increases.

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User Friendly Visual Secret Sharing Scheme (사용자 친화적인 시각 비밀 분산 방법)

  • Yoon, Eun-Jun;Lee, Gil-Je;Yoo, Kee-Young
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.5
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    • pp.472-476
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    • 2008
  • In this paper, we propose a simple and user friendly visual secret sharing scheme based on binary image. The proposed scheme is a new information hiding method which uses only bit-wise exclusive-or (XOR) operation and NOT operation to share a secret binary image information in the user friendly binary images. The proposed scheme has the following merits: (1) It provides efficient embedding and reconstruction algorithms. (2) It provides lossless and perfect reconstruction of the secret binary image. (3) It provides the detection method of its own group by sharing the user friendly image. (4) It can share same sized secret image such as original cover image unlike previous methods.

Sensorless Scheme for Interior Permanent Magnet Synchronous Motors with a Wide Speed Control Range

  • Hong, Chan-Hee;Lee, Ju;Lee, Dong-Myung
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2173-2181
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    • 2016
  • Permanent magnet synchronous motors (PMSMs) have higher torque and superior output power per volume than other types of AC motors. They are commonly used for applications that require a large output power and a wide range of speed. For precise control of PMSMs, knowing the accurate position of the rotor is essential, and normally position sensors such as a resolver or an encoder are employed. On the other hand, the position sensors make the driving system expensive and unstable if the attached sensor malfunctions. Therefore, sensorless algorithms are widely researched nowadays, to reduce the cost and cope with sensor failure. This paper proposes a sensorless algorithm that can be applied to a wide range of speed. The proposed method features a robust operation at low-speed as well as high-speed ranges by employing a gain adjustment scheme and intermittent voltage pulse injection method. In the proposed scheme the position estimation gain is tuned by a closed loop manner to have stable operation in tough driving environment. The proposed algorithm is fully verified by various experiments done with a 1 kW outer rotor-type PMSM.

Fault Detection and Compensation Scheme of Switch Open-fault in VSI for Two-phase Excitation Drive (2상 여자 구동용 전압형 인버터의 스위치 개방고장 검출 및 보상 기법)

  • Lee, Kui-Jun;Park, Nam-Ju;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.1
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    • pp.74-80
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    • 2007
  • This paper proposes the novel open-fault detection/isolation scheme of inverter switch in two-phase excited VSI. This scheme identify open-fault using voltage sensor at lower switches of each phase according to the operating mode. It has benefit of simple implementation, fast detection and robustness in the load so that stab of the system is improved. Also, at faulty mode, it minimizes faulty effect and makes possible continuous operation through the reconfiguration procedure applying four-switch operation. The validity of proposed fault detection scheme is verified by experimental results.