• Journal of Electrical Engineering and Technology
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• v.12 no.6
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• pp.2278-2288
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• 2017

Multilevel converter topologies are widely used in many applications. The cascaded H-bridge multilevel inverter (CHBMI), which is one of many multilevel converter topologies, has been introduced as a useful topology in high and medium power. However, it has a drawback to require a lot of switches. Therefore, the reliability of CHBMI is important factor for analyzing the performance. This paper presents a simple switch fault diagnosis method for single-phase CHBMI. There are two types of switch faults: open-fault and short-fault. In the open-fault, the body diode of faulty switch provides a freewheeling current path. However, when the short-fault occurs, the distortion of output current is different from that of the open-fault because it has an unavailable freewheeling current flow path due to a disconnection of fuse. The fault diagnosis method is based on the zero current time analysis according to zero-voltage switching states. Using the proposed method, it is possible to detect the location of faulty switch accurately. The PSIM simulation and experimental results show the effectiveness of proposed switch fault diagnosis method.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.181_182
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• 2009

Some phenomena occurred when one phase of the line circuit breaker was opened while a generator was operating to connect with the power grid were simulated by PSCAD/EMTDC and the analysis for the reason of operation and non-operation of protective relay will contribute to prevent spreading damage when same prospective faults occur.

• Journal of Power Electronics
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• v.9 no.3
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• pp.377-385
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• 2009

In this paper, a diagnosis method for switch open-circuit faults in three-phase PWM inverters is proposed, which employs support vector machine (SVM) as classifying method. At first, a discrete wavelet transform (DWT) is used to detect a discontinuity of currents due to the fault, and then the features for fault diagnosis are extracted. Next, these features are employed as inputs for the SVM training. After training, the SVM produces an optimized boundary which is used identifying the fault. Finally, the fault classification is performed online with instantaneous features. The experimental results have verified the validity of the proposed estimation algorithm.

• Transactions on Electrical and Electronic Materials
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• v.10 no.2
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• pp.53-57
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• 2009

In this paper we develop a method to observe faults in semiconductor devices and transmission lines by calculating the variation of the reflection function in a dielectric microstrip line that has an open-ended termination containing an optically induced plasma region. It is analyzed with the assumption that the plasma is distributed homogeneously in laser illumination. With the non linear material of degradation, the concentration of the carrier in the part of the material has changed. Since the input wave has produced the phenomenon of reflection, the input signal to the open-ended microstrip lines can be observed on reflection to identify the location of the fault. The characteristic impedances resulting from the presence of plasma are evaluated by the transmission line model. The variation of the reflection wave in the microwave system has been calculated by using an equivalent circuit model. The transient response has been also evaluated theoretically for changing the phase of the variation in the reflection. The variation of characteristic response in differentially localized has been also evaluated analytically.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.24 no.5
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• pp.94-105
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• 2010

To detect faults in an inverter-fed permanent magnet synchronous motor (PMSM) drive under the circumstance having faults in a stator winding and inverter switch, an on-line basis fault detecting scheme during operation is presented. The proposed scheme is achieved by monitoring the second-order harmonic component in q-axis current and the fault is detected by comparing these components with those in normal conditions. The linear interpolation method is employed to determine the harmonic data in normal operating conditions. As soon as the fault is detected, the operating mode is changed to identify a fault type using the phase current waveform. To verify the effectiveness of the proposed fault detecting scheme, a test motor to allow inter-turn short in the stator winding has been built. The entire control algorithm is implemented using DSP TMS320F28335. Without requiring an additional hardware, the fault can be effectively detected by the proposed scheme during operation so long as the steady-state condition is satisfied.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1950-1963
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• 2016

A novel open-circuit fault diagnosis method for 3-phase 4-wire 3-level active power filters based on voltage error correlation is proposed in this paper. This method is based on observing the output pole voltage error of the active power filter through two kinds of algorithms. One algorithm is a voltage error analytical algorithm, which derives four output voltage error analytic expressions through the pulse state, current value and dc bus voltage, respectively, assuming that all of the IGBTs of a certain phase come to an OC fault. The other algorithm is a current circuit equation algorithm, which calculates the real-time output voltage error through basic circuit theory. A correlation is introduced to measure the similarity of the output voltage errors between the two algorithms, and OC faults are located by the maximum of the correlations. A FPGA has been chosen to implement the proposed method due to its fast prototyping. Simulation and experimental results are presented to show the performance of the proposed OC fault diagnosis method.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.1066-1067
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• 2015

This paper presents a diagnosis method for the detection and location of open-short switch faults in the three-phase power conditioning system. A method for switch fault diagnosis on the power conditioning system is proposed, based on the concordia transform. The switch fault types and locations on power conditioning system are diagnosed by a method in which analyze the d-q current vector locus and current pattern. The Simulation results confirm the proposed diagnostic method.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.11
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• pp.1434-1444
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• 1995

Current test has recently been known to be a promising testing method in CMOS VLSI because conventional voltage test can not make sure of the complete detection of bridging, gate-oxide shorts, stuck-open faults and etc. This paper presents a new BIC(built-in current sensor) for the internal current test in CMOS logic circuit. A single phase clock is used in the BIC to reduce the control circuitry of it and to perform a self- testing for a faulty current. The BIC is designed to detect the faulty current at the end of the clock period, so that it can test the CUT(circuit under test) with much longer critical propagation delay time and larger area than conventional BICs. The circuit is composed of 18 devices and verified by using the SPICE simulator.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.5
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• pp.457-465
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• 2011

The fault analysis and detecting algorithm for a 3 phase diode rectifier is proposed. The 3 phase dioderectifier is used for the AC power rectifier of the PWM inverter. The input power or diode faults cause theripples of the DC voltage, degradation of the control performance and life shortening of the DC link capacitor.In this paper, the ripple of the DC voltage is mathematically analyzed for the earth fault of input power andopen circuit fault of the diode, respectively. The fault detection and type of fault can be obtained by comparingthe average DC voltage and the instant DC voltage which is sampled with 6 times of grid frequency. Theproposed method can be easily applicable and doesn't require additional circuit. The experimental and simulationresults are presented to verify the validity of the proposed method.

• Journal of Electrical Engineering and Technology
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• v.1 no.3
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• pp.271-278
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• 2006

This paper scrutinized the damping effects of installing the prototype PSSs by a transient analysis for eight buses of faults in the South Korean power system. The PSSs used have the co-PSS blocks for IEEEST model with a single input and the co+power PSS blocks for PSS2A model with dual inputs. The simulation tool was a TSAT(Transient Security Assessment Tool) developed by Powertech Labs Inc. The voltages of the transmission line for simulations were 765kV and 345kV, and the faults for eight cases were sequenced by considering the open state and the close state of the lines. In the simulations, the three-phase line to ground (L-G) fault generated different points for each region. The simulations were compared to the cases of no PSS, partial IEEEST and PSS2A, absolute IEEEST, and absolute PSS2A to show that the power system oscillation can be effectively damped by PSS modules. Simulations were conducted to confirm the effectiveness for the KEPCO (Korea Electric Power Corporation) power system.