• Title/Summary/Keyword: Open-circuit voltage

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Folded-Cascode Operational Amplifier for $32{\times}32$ IRFPA Readout Integrated Circuit using the $0.35{\mu}m$ CMOS process ($0.35{\mu}m$ CMOS 공정을 이용한 $32{\times}32$ IRFPA ROIC용 Folded-Cascode Op-Amp 설계)

  • Kim, So-Hee;Lee, Hyo-Yeon;Jung, Jin-Woo;Kim, Jin-Su;Kang, Myung-Hoon;Park, Yong-Soo;Song, Han-Jung;Jeon, Min-Hyun
    • Proceedings of the IEEK Conference
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    • 2007.07a
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    • pp.341-342
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    • 2007
  • The IRFPA (InfraRed Focal Plane Array) ROIC (ReadOut Integrated Circuit) was designed in folded-cascode Op-Amp using $0.35{\mu}m$ CMOS technology. As the folded-cascode has high open-loop voltage gain and fast settling time, that used in many analog circuit designs. In this paper, folded-cascode Op-Amp for ROIC of the $32{\times}32$ IRFPA has been designed. HSPICE simulation results are unit gain bandwidth of 13.0MHz, 90.6 dB open loop gain, 8 V/${\mu}m$ slew rate, 600 ns settling time and $66^{\circ}$ phase margin.

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A Study on Circuit Topology for the Electrical Power Failure and Open-Phase Fault Detection of Industrial Field (산업현장 정전 및 결상사고 감지회로 토폴로지 연구)

  • Park, Dong-Hun;Kwak, Dong-Kurl;Jeon, Hoe-Joong;Jeon, Ho-Jin
    • Proceedings of the KIPE Conference
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    • 2019.07a
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    • pp.540-542
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    • 2019
  • This paper proposes an open-phase fault control system using 3-phase neutral voltage. The proposed control system is designed as a new topology which uses the potential difference between neutral point and ground of three phase. The open-phase detection system is also configured to Y-wiring of three capacitance devices of the same capacity to each line of three phase power source R-S-T. This paper also designs a mobile phone application for remote alarm of open-phase fault.

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A High Density Memory Device for Next Generation Low-Voltage and High-Speed Operations (차세대 저 전압, 고속 동작 요구에 대응하는 대용량 메모리의 개발)

  • 윤홍일;이현석;유형식;천기철
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.11a
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    • pp.3-5
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    • 2000
  • 1.8V,4Gb DDR SDRAM설계 및 제작을 수행하였다. DRAM동작 시 발생하는 Bit Line간 CouplingNoise를 보상하기 위한 Twisted Open Bit Line 구조를 제안하였다. Low Voltage Operation으로 인한 Bit Line Sense Amplifier 의 동작 저하를 보상하기 위한 BL S/A Pre-Sensing 방식 및 Reference Bit Line Voltage Calibration 구조를 제안하였다. Chip면적 증가로 인한 동작속도 감소의 보상을 위해 Repeater Driver 구조를 Core 및 Periphery Circuit에 적용하여 동작 대비 Chip 면적의 증가를 최소화 하도록 하였다.

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PEMFC performance on reverse voltage by fuel starvation (연료 부족에 의한 고분자전해질형 연료전지의 역전압 성능)

  • Lee, Hung-Joo;Song, Hyun-Do;Kim, Jun-Bom
    • Transactions of the Korean hydrogen and new energy society
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    • v.17 no.2
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    • pp.133-140
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    • 2006
  • The performance of proton exchange membrane fuel cell was decreased by reverse voltage using fuel starvation. Performance decrease in local area could be affected by duration and extent of reverse voltage. Hydrogen and air stoichiometic ratio was used to find the experimental condition of abrupt voltage decrease. LabVIEW was used to make control logic of automatic load off system in preset voltage. Reverse voltage experiment was done down to -1.2 V at constant current condition. When fuel cell voltage was reached to preset voltage, electronic load was disconnected to make open circuit voltage for 1 minute. Fuel cell performance was checked every 5 cycle and the degree of performance decrease and/or recovery was estimated. Ohmic resistance and charge transfer resistance were increased and platinum surface area was reduced 41% after reverse voltage experiment.

Electrical Leakage Levels Estimated from Luminescence and Photovoltaic Properties under Photoexcitation for GaN-based Light-emitting Diodes

  • Kim, Jongseok;Kim, HyungTae;Kim, Seungtaek;Choi, Won-Jin;Jung, Hyundon
    • Current Optics and Photonics
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    • v.3 no.6
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    • pp.516-521
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    • 2019
  • The electrical leakage levels of GaN-based light-emitting diodes (LEDs) containing leakage paths are estimated using photoluminescence (PL) and photovoltaic properties under photoexcitation conditions. The PL intensity and open-circuit voltage (VOC) decrease because of carrier leakages depending on photoexcitation conditions when compared with reference values for typical LED chips without leakage paths. Changes of photovoltage-photocurrent characteristics and PL intensity due to carrier leakage are employed to assess the leakage current levels of LEDs with leakage paths. The current corresponding to the reduced VOC of an LED with leakage from the photovoltaic curve of a reference LED without leakage is matched with the leakage current calculated using the PL intensity reduction ratio and short-circuit current of the LED with leakage. The current needed to increase the voltage for an LED with a leakage under photoexcitation from VOC of the LED up to VOC of a reference LED without a leakage is identical to the additional current needed for optical turn-on of the LED with a leakage. The leakage current level estimated using the PL and photovoltaic properties under photoexcitation is consistent with the leakage level measured from the voltage-current characteristic obtained under current injection conditions.

Frequency response of Photovoltaic Cell using ZnPc (ZnPc를 이용한 유기태양전지의 주파수 응답 특성)

  • Ahn, Joon-Ho;Kim, Ho-Sik;Park, Jae-Joon;Lee, Won-Jae;Jang, Kyung-Uk;Seo, Dae-Sik;Kim, Tae-Wan;Lee, Joon-Ung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.11a
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    • pp.285-286
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    • 2005
  • Organic photovoltaic properties were studied in ZnPc/$C_{60}$ heterojunction structure by varying the organic layer thicknesses and exiton blocking layer(EBL). Current density-voltage characteristics of organic photovoltaic cells were measured using Keithley 236 source-measure unit, a 500W xenon lamp (ORIEL 66021) for a light source and Agilent 4294A impedance analyzer in the range of 40 Hz $\sim$ 1 MHz. From the analyses of current-voltage characteristics such as short-circuit current density, open-circuit voltage and power conversion efficiency, optimum thickness of the organic layer were obtained and frequency response such as electrical conductance.

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The Design of Digital Controller for Boost Converter on Photovoltaic System (태양광용 부스트 컨버터의 디지털 제어기 설계)

  • Im, Ji-Hoon;Choi, Ju-Yeop;Song, Seung-Ho;Choy, Ick;Jeong, Seung-Hwan;An, Jin-Ung;Lee, Dong-Ha
    • Journal of the Korean Solar Energy Society
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    • v.30 no.6
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    • pp.22-27
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    • 2010
  • In photovoltaic system, the specifications of solar array is changed as open circuit voltage and short circuit current because of cell temperature and solar radiation. A boost converter of this system connects between output of photovoltaic system and DC link capacitor of grid connected inverter as controlling duty ratio. Therefore to supply stable voltage to the grid, a boost converter is need to keep certain voltage output. Considering the capacitance and the resistance of boost converter, this paper designed proper digital controller.

Linear Tapered Slot Rectifying Antenna for Portable UHF-Band RFID System (휴대용 UHF대역 RFID 시스템을 위한 선형 테이퍼드 슬롯 정류 안테나)

  • Pyo, Seongmin
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.368-371
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    • 2020
  • In this paper, we propose a linear tapered slot rectifying antenna for a portable UHF-band RFID system. Since the proposed rectifying antenna does not use a dielectric substrate, the planar antenna is implemented with a thin metal thickness. The rectifier circuit converts input RF power into output DC voltage using a voltage doubler circuit based on two anti-parallel schottky diodes. The rectifying antenna is integrated by the voltage doubler circuit into a linear tapered slot antenna. For conjugate impedance matching of the rectifying circuit and the linear tapered slot antenna, the source-pull method was utilized by adjusting the angle of the tapered slot and the length of the antenna feed line. The proposed antenna prototype has been verified with the electrical and radiation characteristics through RF-DC conversion and far-field radiation test in open space measurement environment. Finally, the proposed antenna is realized to 0.23-wavelength (75 mm) and 0.18-wavelength (60 mm) at 915 MHz center frequency.

Design of an Energy Harvesting Circuit Using Solar and Vibration Energy with MPPT Control (MPPT 제어기능을 갖는 빛과 진동 에너지를 이용한 에너지 하베스팅 회로 설계)

  • Yoon, Eun-Jung;Hwang, In-Ho;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of IKEEE
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    • v.16 no.3
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    • pp.224-234
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    • 2012
  • This paper describes an energy harvesting circuit using solar and vibration energy with MPPT(Maximum Power Point Tracking) control for micro sensor nodes. The designed circuit employs MPPT control to harvest maximum power available from a PZT vibration element and an integrated solar cell. The harvested energies are simultaneously combined and stored in a storage capacitor, and then managed and transferred into sensor node by PMU(Power Management Unit). MPPT controls are implemented using the linear relationship between the open-circuit voltage of an energy transducer and its MPP(Maximum Power Point) voltage. The proposed circuit is designed in a CMOS 0.18um technology and its functionality has been verified through extensive simulations. The designed energy harvesting circuit and integrated solar cell occupy $2.85mm^2$ and $8mm^2$ respectively.

The efficiency charateristics of intrinsic layer thickness dependence for amorphous silicon single junction solar cells (Intrinsic layer 두께 가변에 따른 단일접합 비정질 박막 태양전지의 효율 특성 변화)

  • Yoon, Ki-Chan;Kim, Young-Kook;Heo, Jong-Kyu;Choi, Hyung-Wook;Yi, Young-Suk;Yi, Jun-Sin
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.80-82
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    • 2009
  • The dependence of the efficiency characteristics of hydrogenated amorphous silicon single junction solar cells on the various intrinsic layer thickness has been investigate in the glass/$SnO_2$:F/p,i,n a-Si:H/Al type of amorphous silicon solar cells by cluster PECVD system. The open circuit voltage, short circuit current, fill factor and conversion efficiency have been measured under AM 1.5 condition. The result of the cell performance was improved about 8.2% due to an increase in the short circuit current.

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