• 한국초전도ㆍ저온공학회논문지
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• 제3권1호
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• pp.40-44
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• 2001

Recently. the high-tc superconducting fault col-rent limiters (SFCL) are studied worldwide to be classified as a resistive type or an inductive type such as a magnetic shielding type and a inductive type. The high-tc SFCL wish an open core belongs to the magnetic shielding type SFCL. Unlike conventional magnetic shielding type SFCLS it uses the open core to reduce the mechanical vibrations and installation space, The high-tc SFCL with an open core was designed and manufactured by stacking three BSCCO 2212 tubes. It was tested in the maximum source voltage of 400 Vrms. The results such as the reduction of fault current and impedance of the SFCL are described in this paper. The results show that the fault current in the source voltage of 400 Vrms was reduced to be about 123 Apeak. about 3.9 times greater than the normal state current. Also, the impedance of the high-tc SFCL was about 9${\Omega}$ about 9 times greater than the normal state impedance. The impedance of the SFCL appears just after the fault, and its size is dependent on the source voltage. From the impedance, the inductance of the SFCL was calculated.

• Nuclear Engineering and Technology
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• 제51권8호
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• pp.1978-1982
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• 2019

The paper presents the electrical performance measurements of a prototype nuclear battery and two types of betavoltaic cells. The electrical performance was assessed by measuring current-voltage properties (I-V) and determining the short-circuit current and the open-circuit voltage. With ⁶³Ni as an irradiation source, the open-circuit voltage and the short-circuit current were determined as 1 V and 64 nA, respectively. The prototype consisted of 10 betavoltaic cells that were prepared using radioactive ⁶³Ni. Electroplating of the radioactive ⁶³Ni on an ohmic contact (Ti-Ni) was carried out at a current density of 20 mA/㎠. Two types of betavoltaic cells were studied: with an external ⁶³Ni source and a ⁶³Ni-covered source. Under irradiation of the ⁶³Ni source with an activity of 10 mCi, the open-circuit voltage V_oc of the fabricated cells reached 151 mV and 109 mV; the short-circuit current density J_sc was measured to be 72.9 nA/cm2 and 64.6 nA/㎠, respectively. The betavoltaic cells had the fill factor of 55% and 50%, respectively.

• 대한전자공학회논문지
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• 제11권2호
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• pp.33-39
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• 1974

VNIC를 구성하는 방법으로서, 공통베이스접속회로의 베이스단자에 제어전압을 인가하는 방법을 제안하고 이것을 모델화한다. 단낙안정형은 제어압력을 입력전력에 종속하도록 함으로써 실현가능하며, 개방안정형은 입력전류에 종속인 출력전력에 비례하도록 함으로써 가능하다. 제안한 회로모델에 의하여, 회로를 구성하오 해석하여, 회로모델의 횡성기법의 타당성을 찾고, VNIC의 구성이론을 평이화하고자 한다.

• Journal of Power Electronics
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• 제16권6호
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• pp.2192-2201
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• 2016

Wind energy is currently the fastest-growing electricity source worldwide. The cost efficiency of wind generators must be high because these generators have to compete with other energy sources. In this paper, a system that utilizes an open-winding permanent-magnet synchronous generator is studied for wind-energy generation. The proposed system controls generated power through an auxiliary voltage source inverter. The VA rating of the auxiliary inverter is only a fraction of the system-rated power. An adjusted control system, which consists of two main parts, is implemented to control the generator power and the grid-side converter. This paper introduces a study on the effect of unbalanced voltages for the wind-generation system. The proposed system is designed and simulated using MATLAB/Simulink software. Theoretical and experimental results verify the validity of the proposed system to achieve the power management requirements for balanced and unbalanced voltage conditions of the grid.

• Journal of Power Electronics
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• 제10권5호
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• pp.468-476
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• 2010

This paper proposes and develops a new direct voltage control (DVC) approach. This method is designed to be applied in various applications for AC drives fed with a three-phase voltage source inverter (VSI) working with a constant switching time interval as in the standard direct torque control (DTC) scheme. Based on a very strong min(max) criterion dedicated to selecting the inverter voltage vector, the developed DVC scheme allows the generation of accurate voltage forms of waves. The DVC algorithm is implemented on a dSPACE DS1104 controller board and then compared with the space vector pulse width modulation technique (SVPWM) in an open loop AC drive circuit. To demonstrate the efficiency of the developed algorithm in real time and in closed loop AC drive applications, a scalar control scheme for induction motors is successfully implemented and experimentally studied. Practical results prove the excellent performance of the proposed control approach.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.54-57
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• 2002

In this study, a new programming method, to minimize the generation of Si-SiO$_2$ interface traps of scaled SONOS flash memory as a function of number of program/erase cycles has been proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim (MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are open. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ prograss/erase cycles can be realized by the proposed programming method. The asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of scaled SONOS devices because electrical stress applied to the Si-SiO$_2$ interface is reduced by short programming time.

• 한국전기전자재료학회논문지
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• 제16권1호
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• pp.5-10
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• 2003

In this study, a new programming method to minimize the generation of Si-SiO$_2$interface traps of SONOS nonvolatile memory device as a function of number of porgram/erase cycles was proposed. In the proposed programming method, power supply voltage is applied to the gate. forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim(MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and dram are left open. Also, the asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics or SONOS devices because electrical stress applied to the Si-SiO$_2$interface is reduced due to short program time.

• 대한전자공학회논문지SD
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• 제38권8호
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• pp.54-61
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• 2001

High-bandwidth DRAM을 위해 1Gb/s의 데이터 전송률까지 동작하고 그 출력 전압 스윙이 온도와 전원 전압(VDD) 변동에 무관한 CMOS open-drain 출력 구조 회로를 설계하였다. 출력 구동 회로는 여섯 개의 binary-weighted NMOS 트랜지스터로 구성되는데, 이 여섯 개 중에서 ON시킬 current control register의 내용은 추가 호로 없이 DRAM 칩에 존재하는 auto refresh 신호를 이용하여 새롭게 수정하였다. Auto refresh 시간 구간동안 current control register를 수정하는데, 이 시간 구간동안 부궤환 (negative feedback) 동작에 의해 low level 출력 전압($V_OL$)이 저전압 밴드갭 기준전압 발생기(bandgap reference voltage generator)에 의해서 만들어진 기준전압($V_{OL.ref}$)과도 같도록 유지된다. 테스트 칩은 1Gb/s의 데이터 전송률까지 성공적으로 동작하였다. 온도 $20^{\circ}C$~$90^{\circ}C$, 전원 전압 2.25V~2.75V영역에서 최악의 경우 제안된 출력 구동 회로의 $V_{OL.ref}$와 $V_OL$의 변동은 각각 2.5%와 725%로 측정된 반면, 기존의 출력 구동 회로의 $V_OL$의 변동은 같은 온도의 전원 접압의 영역에 대해 24%로 측정되었다.

• 전력전자학회논문지
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• 제12권2호
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• pp.115-122
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• 2007

본 논문은 NPC 인버터(Neutral-point-clamped ye티or) 시스템을 구성하는 스위칭 소자의 개방성 고장이 발생하였을 경우 인버터 시스템의 고장 제어를 위한 새로운 고장 검출 방법을 제안하였다. 고장 스위치의 검출은 NPC 인버터 각상의 폴-전압을 이용하여 수행되며, 고장 검출 이후 연속적인 평형 3상 전력을 출력하기위해 NPC 인버터는 2상 운전 시스템으로 재구성된다. 인버터 시스템의 신뢰성 향상을 위하여 고장 검출과 시스템 재구성을 통한 고장 허용 제어를 구현하였다. 제안된 고장 검출 방법은 기존 방법보다 빠른 검출 시간을 가지며 간단한 알고리즘으로서 구현이 용이하다는 장점을 갖는다. 빠른 고장 검출 능력은 고장 검출 시간의 지연에서 올 수 있는 직류-링크 커패시터의 전압 불평형 문제, 다른 스위치의 전압 스트레스 증가로 인한 소자 파괴와 같은 악영향을 개선시킬 수 있다. 제안된 방법의 타당성을 입증하기 위하여 시뮬레이션과 실험을 수행하였다.

• 한국안전학회지
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• 제22권4호
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• pp.20-25
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• 2007

Instrument transformers are a safe measurement device designed to measure high voltage and large current. A current transformer(CT) is a type of instrument transformer designed to provide a current in its secondary winding proportional to the current flowing in its primary. It is commonly used in metering and protective relaying in the electrical power industry where it facilitates the safe measurement of large current. But, care must be taken that the secondary of a current transformer is not disconnected from its load while current is flowing in the primary, as this will produce a dangerously high voltage across the open secondary, and may permanently affect the accuracy of the transformer. Especially, industrial disaster such as an electric shock and/or a burn accident occurs occasionally by disregard of warning or attention. In this paper, we developed the detector for open of current transformer secondary terminal, and which was tested by the Korea Electrotechnology Research Institute. Test results show that Current Transformer secondary Open Detector(CTOD) interrupted within one second electronically when the 2nd terminal of current transformer opened.