• Journal of Biomedical Engineering Research
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• v.12 no.3
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• pp.209-214
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• 1991

Digital fetal monitoring system based on the personal computer combined with the digital signal processing (DSP) board was implemented. The DSP board acquires and digitally processes ultra- sound fetal Doppler signal for digital signal conditioning, rectification, low -pass filtering, autocorrealtion function calculation and its peak detection. The personal computer interfaced with the DSP board is in charge of graphic display, hardcopy, data transmission and on -line analysis of fetal heart rate change including on - line warning system, base -line estmation, acceleration, deceleration and variability. It is one of the most suitable situation to apply the DSP chip for siganl conditioning, digital filtering of ultrasound fetal Dopier signal and fetal heart rate estimation using autocorrelation technique .

• 제어로봇시스템학회:학술대회논문집
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• 1993.10a
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• pp.185-188
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• 1993

The goal of this paper is to develop an on-board controller for a model helicopter's hovering attitude control, using i8096 one-chip microcontroller. Required controller algorithm is programmed in ASM-96 assembly language and downloaded into an i8096 microcontroller. The performance of hovering flight using this system is verified by experiments with the model helicopter mounted on an instrumented flight stand where 3 potentiometers and an optical proximity sensor measure te attitude and main rotor speed of the helicopter.

• 제어로봇시스템학회:학술대회논문집
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• 1991.10a
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• pp.779-782
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• 1991

The design of a control language of mobile robot system for autonomous operations is explained in this paper. The on-board controller consists of one-chip microcontrollerbased system and communicates with the host computer. It decodes the received commands and controls the mobile robot. The control language is basically of interpreter type and is consisted of motion primitives and sensing primitives. The combinations of primitives are constructed for mobile robot operations.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.2
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• pp.401-407
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• 2014

There are increasing interests in COB (Chip On Board) that densely arranged many LED chips on one board in order to solve the heat issue. There are many problems being on the rise: the lifespan decreases as the temperature of LED devices increases; Red Shift phenomenon, in which wave length of spectral line moves from original wave length to long wave length, occurs; and optical power decreases as $T_j$ increases. In order to resolve such problems, this study selected the optimum thickness and length of Fin, planned the second Heat sink that is optimum for COB LED with 15W, and analyzed thermal mode by Solid Works Flow Simulation through 15W COB packaging with the planned Heat sink. 15W COB down-light Heat sink that is produced based on this analysis was utilized to analyze thermal mode through contact thermometer and electrical properties through Kelthley 2430.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1305-1308
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• 1987

This paper presents a design of an optimized implantable biotelemetry system and the fabrication of custom CMOS LSI for implementing this system. The internal circuits of this system are fabricated on a single silicon chip with a size of $4{\times}5mm^2$. This LSI is designed and fabricated not only to get as small size and low power dissipation as possible, but also to have multiple function. Its main functions are to select one of implanted sensors and to accomplish ON - OFF power switching of an implanted battery by receiving appropriate Command signals and control signals fran external circuits. The internal system which was assembled on a bread-board using fabricated LSI chip is confirmed to work as designed. The total power dissipation of this interal system was $10.12{\mu}W$.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.2
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• pp.23-34
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• 2013

Over the past several decades in the microelectronics industry, devices have gotten smaller, thinner, and lighter, without any accompanying degradation in quality, performance, and reliability. One permanent and deniable trend in packaging as well as wafer fabrication industry is system integration. The proliferating options for system integration, recently, are driving change across the overall semiconductor industry, requiring more investment in developing, ramping and supporting new die-, wafer- and board-level solution. The trend toward 3D system integration and miniaturization in a small form factor has accelerated even more with the introduction of smartphones and tablets. In this paper, the key issues and state of the art for system integration in the packaging process are introduced, especially, focusing on ease transition to next generation packaging technologies like through silicon via (TSV), 3D wafer-level fan-out (WLFO), and chip-on-chip interconnection. In addition, effective solutions like fine pitch copper pillar and MEMS packaing of both advanced and legacy products are described with several examples.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.4
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• pp.494-502
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• 2001

GPS(Global Positioning System) and GLONASS(GLObal Navigation Satellite System) are basic technologies providing the information of the position and the time, and they have various applications such as navigation, survey, control, and so on. However, each GPS and GLONASS has limited number of visible satellites, and, from the view of strategy, it is undesirable to be heavily dependent on only one system. Thus, GPS/GLONASS combined receiver became required to obtain more precise navigation and system stability. In this paper, the RF front end of GPS/GLONASS combined receiver was fabricated on 130$\times$80 $\textrm{mm}^2$ PCB(Printed Circuit Board), and its system application was shown finally one chip possibility of GLONASS receiver is studied.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.4
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• pp.149-154
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• 2018

This paper describes the fabrication and heat transfer property of 50 watts rated LED array module where multiple chips are mounted on chip-on-board type ceramic-metal hybrid substrate with high heat dissipation property for high power street and anti-explosive lighting system. The high heat transfer ceramic-metal hybrid substrate was fabricated by conformal coating of thick film glass-ceramic and silver pastes to form insulation and conductor layers, using thick film screen printing method on top of the high thermal conductivity aluminum alloy heat-spreading panel, then co-fired at $515^{\circ}C$. A comparative LED array module with the same configuration using epoxy resin based FR-4 PCB with thermalvia type was also fabricated, then the thermal properties were measured with multichannel temperature sensors and thermal resistance measuring system. As a result, the thermal resistance of the ceramic-metal hybrid substrate in the $4{\times}9$ type LEDs array module exhibited about one third to the value as that of FR-4 substrate, implying that at least triple performance of heat transfer property as that of FR-4 substrate was realized.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.4
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• pp.737-746
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• 2009

In this study, we have developed one chip system IC for preventing the overload, detecting an abnormal conditions, and controlling the fire prevention in the intelligent home appliances. For the purpose, a circuit detectable an electric leak for preventing an electric shock, and a circuit detectable arc that has effect directly on the fire are designed. The circuits designed on every block are verified by comparing simulation with bread-boarding using a standard transistors. The system IC is fabricated by using 34 V 2 metal $1.5{\mu}m$ bipolar transistor process from evaluation results. The electrical performances of IC application circuits and the system IC equipped on PCB board are evaluated. It is confirmed that the system IC is well operated for arc and ground fault(GF) signal.