• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.338-343
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• 2010

Low cost motor drives are being sought for high volume energy efficient home appliances. Key to the realization of such low cost motor drives is to reduce the power electronic converter in terms of its components, particularly the active devices, finding the motor with least complexity for manufacturing and a controller that could extract the desired performance from the machine and converter combination. These and other factors such as self-starting, speed control over a wide range and most of all the crowning aspect of a four quadrant operation with bare minimum number of controllable switch (or switches) remain as formidable challenges for low cost motor drive realization. In this paper, a four quadrant switched reluctance motor (SRM) drive with only one controllable switch is realized by using a two-phase machine. The theory and operation of the proposed four-quadrant SRM drive with the proposed control algorithm for its realization are described. The motor drive is modeled, simulated and analyzed to verify its feasibility for self-starting, speed control and for four quadrant operation and the simulation results are presented. Experimental results confirm the validity of the proposed control algorithm for four quadrant control of the SRM drive. The focus of the paper is mainly directed toward the control algorithm for realizing the four-quadrant operation of the two-phase SRM drive with a single controllable switch converter.

• Journal of Magnetics
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• v.16 no.3
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• pp.234-239
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• 2011

Transcranial magnetic stimulation utilizes the method of controlling applied time and changing pulse by output pulse through power density control for diagnosis purposes. Transcranial magnetic stimulation can also be used in cases where diagnosis and treatment are difficult since output pulse shape can be changed. As intensity, pulse range, and pulse shape of the stimulation pulse must be changed according to lesion, the existing sine wave-shaped stimulation treatment pulse poses limitations in achieving various treatments and diagnosis. This study actualized a new method of transcranial magnetic stimulation that applies a 3 Stage 2 Switch( power semiconductor 2EA) for controlling pulse repetition rate by achieving numerous switching control of stimulation coil. Intensity, pulse range, and pulse shape of output can be freely changed to transform various treatment pulses in order to overcome limitations in stimulation treatment presented by the previous sine wave pulse shape. The method of freely changing pulse range by using 3 Stage 2 Switch discharge method is proposed. Pulse shape, composed of various pulse ranges, was created by grafting PFN (Pulsed Forming Network) through AVR AT80S8535 one-chip microprocessor technology, and application in transcranial magnetic stimulation was achieved to study the output characteristics of stimulation treatment pulse according to delaying time of the trigger signal applied in section switch.

• Bulletin of the Korean Chemical Society
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• v.22 no.8
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• pp.903-908
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• 2001

The gene aeg-46.5, which is expressed under anaerobic condition, has putative triple -10 regions and four transcription start sites. The mRNA transcription level and its start point change depending on the aerobic/anaerobic growth condition. RNA polymerase and its regulatory proteins must choose which of three -10 region to use. The putative triple 10 region was mutated to make only one of them function with consensus -10 region sequence (TATAAT) and the other two as non-functional region. The results show that the second and third -10 regions are used for the aerobic/anaerobic expression. The third -10 region is responsible for the high aerobic to anaerobic switch ratio. This suggests that only the last two of the putative triple -10 region have functions on aeg-46.5 gene expression switch control. The phenotype of the mutated promoter was tested in the wild type cell and narL - cell. The results indicate that the control by NarL is independent from the selection of -10 region. The expression patterns on multi-copy plasmids and on single-copy chromosome were compared. These results show that the aerobic/anaerobic switch control of aeg-46.5 is through the choice of -10 region. The mechanism of choosing different -10 region remains to be seen.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.684-690
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• 2010

Most of the existing SoCs have shared bus architecture which always has a bottleneck state. The more IPs are in an SOC, the less performance it is of the SOC, Therefore, its performance is effected by the entire communication rather than CPU speed. In this paper, we propose cross-bar switch bus architecture for the reduction of the bottleneck state and the improvement of the performance. The cross-bar switch bus supports up to 8 masters and 16 slaves and parallel communication with architecture of multiple channel bus. Each slave has an arbiter which stores priority information about masters. So, it prevents only one master occupying one slave and supports efficient communication. We compared WISHBONE on-chip shared bus architecture with crossbar switch bus architecture of the SOC platform, which consists of an OpenRISC processor, a VGA/LCD controller, an AC97 controller, a debug interface, a memory interface, and the performance improved by 26.58% than the previous shared bus.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.1
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• pp.73-78
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• 2004

There are random, continuous, and periodic allocation methods in the time slot sequence integrity for the multi-slot call. In the T-S-T switch, there are 2 time switch and the 2*2 space switch. Three time-slot allocation methods are suggested for the simulation. In the simulation, the searching times for time-slots on a multi-slot call is chosen to 32, and the simulation time is chosen to 100,000 seconds. Three kinds of calls are supposed for a multi-slot call : one time-slot call, two time-slot call, and 6 time-slot call. In the simulation, the carried traffic and the blocking probability are calculated on the 3 different traffic cases of 8:1:1, 6:2:2, 4:3:3(one time-slot : two time-slot : 6 time-slot) multi slot calls. It is shown that the blocking probability for the periodic time slot allocation method is best. As a result, the periodic time-slot allocation method is the proper one for the multi-slot ATM switch.

• Journal of KIISE:Information Networking
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• v.27 no.2
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• pp.187-196
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• 2000

Failures in ATM networks can occur at virtual path (VP) links, virtual path switches, and virtual channel (VC) switches. Restoration schemes have been proposed for VP link and VP switch failures, however, none for VC switch failures. In general, VC switches are used for edge nodes in protection domains. Since even only one VC switch failure can cause a critical problem, new restoration schemes for VC switch failures are highly required. Restoration schemes at the VP level proposed so far can be categorized into those using the flooding algorithm and those using the backup virtual path (BVP) concept. Even though the latter cannot handle unpredictable failures, it has some advantages such as fast restoration and low spare capacity requirement. In this paper, we propose new restoration schemes using a new type of BVPs to handle VC switch failures. The simulation results show that the proposed schemes can restore virtual connection failures due to VC switch failures without degrading restorability for VP failures.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.11C
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• pp.113-122
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• 2001

Several guidelines can be developed for a satellite-based ATM switch. One of the most important of these is that the switch must provide a requirement for CLRs on the order of 10-10 to meet the QoS of high- performance traffic and avoid costly retransmissions. In this paper, the proposed approach shows not only the better traffic performance but also requires the little switching elements and buffers compared with original Knockout switch and other scheduling algorithm. As a result, the complexity becomes reduced. Simulation results indicate that proposed approach shows excellent cell loss ratio compared with existing switch architecture. Also, iii performance can be approached to the cell loss ratio, which is requirement for the satellite system, as window size increases. An(1 it shows thats low complexity is induced. Therefore, the proposed approach is appropriate for satellite on-board ATM switch architecture.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.12
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• pp.2911-2918
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• 2014

Nowadays, most Internet servers run on virtual a network which connects each virtual machine, to process large amounts of data on single physical computer. The virtual machines for their own purposes are interconnected to other virtual server systems with various types of operating systems. Each virtual server may share one physical computer resources and operates at a service seamlessly to each other. Sometimes even the virtual machines are implemented using a method that lease the physical IT resources without purchasing physical server. Therefore, a virtual switch is needed to improve the performance when a large number of virtual machines operate on physical server. In this study, the implementation and investigation was performed for the virtual switches, OpenvSwitch and DPDKvSwitch, in order to provide the necessary high-performance cloud services to creative business.

• The Transactions of the Korea Information Processing Society
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• v.4 no.2
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• pp.628-638
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• 1997

This paper describes an implementation of fault simulator that can switch level fault models such as transistor stuck-open and stuck-closed faults as well as stuck-at faults. It overcomes the limitation when only stuck-at faults are used in VLSI circuits. Signal flow of a transistor switch is bidirectional in its nature, but most of signal flows in a switch level circuits, about 95%, are in one direction. This fault simulator focuses on the way which changes a switch level circuit into a graph model with two directed edges. Two paths from Vdd to ground and from ground to directions. Logic simulation is performed along dominant signal flows. The switch level fault simulation estimates the dominant path by injecting switch-level fualts, and pattern vectors are used for faults simulation. Experimental results are shown to demonstrate correctness of the fault simulator.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.3B
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• pp.209-216
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• 2003

In this paper, we propose ATM switch structure including AAL type 2 switch which can efficiently transmit low-bit rate data, even if the network has many endpoints. We simulate the architecture of ATM switch fabric that is modeled in computer program and analyze the performance according to offered loads. ATM switch proposed in this paper can support cell switching for all types of AAL cells which consist of AAL type 1, AAL type 2, AAL type 3/4, and AAL type 5 cells. We propose two switch fabric methods; One supports the AAL type 2 cell processing per input port, the other global AAL type 2 cell processing for every input port. The simulation results show that the latter is superior to the former. But the former has a merit for easy implementation and extensibility. The proposed ATM switch fabric is widely applicable to mobile communication, narrow band services over ATM network and wireless ATM as well as general ATM switching fabric.