• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.2
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• pp.291-301
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• 1999

A method for the synthesis of one-dimensional nonlinear distribution function is presented for the desired inverse scattering pattern. This method is based on the inverse transform of the solution of the Riccati equation derived from one-dimensional inverse scattering problem. Since the solution is analogous to the array factor or normalized space factor in collinear array antenna, the synthesis method for field pattern is applied for the construction of the involved line-source nonlinear distribution function. The suggested method is carried out under the optimization process, and is numerically verified by synthesizing the dispersive transmission line profile within the specified frequency band and control of scattered field on resistive strip.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.4
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• pp.13-16
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• 1984

This paper proposes a new layout algorithm in order to minimize chip area in one dimensional MOS - LSI composed of basic cells, such as NAND or NOR gates. The virtval gates are constructed, which represent I/O of signal lines at the left-most and at the right-most side of the MCS gate array. With this, a heuristic algorithm is realized that can minimize the number of straight connectors passing through each gate, and as the result, minimize the horizontal tracks necessary to route. The usefulness of the algorithm proposed is shown by the execution of the experimental program on practical logic circuits.

• Proceedings of the KSME Conference
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• 2008.11b
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• pp.2011-2016
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• 2008

A new method is presented for developing a simulation program which can analyze the heat transfer characteristics of fin-tube heat exchanger. This method is able to describe several types of refrigerant circuit arrangement. The delivery path of air and refrigerant properties is simplified by transforming three-dimensional array into one-dimensional array. By comparing simulated results with experiment results, the deviation was 8.2%. Several fin-tube heat exchangers of different design factors and operating conditions were simulated using this program. It was shown that this program could be used for designing practical fin-tube heat exchangers.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.20 no.12
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• pp.833-843
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• 2008

A new method is presented for developing a simulation program which can analyze the heat transfer characteristics of fin-tube heat exchanger. This method is able to describe several types of refrigerant circuit arrangement. The delivery path of air and refrigerant properties is simplified by transforming three-dimensional array into one-dimensional array. By comparing simulated results with experiment results, the deviation was 8.2%. Several fin-tube heat exchangers of different design factors and operating conditions were simulated using this program. It was shown that this program could be used for designing practical fin-tube heat exchangers.

• Journal of Information Display
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• v.13 no.2
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• pp.55-59
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• 2012

In this paper, a concept of an integrated elastomer substrate for a three-dimensional (3D) liquid crystal display based on the integral-imaging method is presented. The elemental lens array and columnar spacers were integrated into one of the two substrates, an elastomer substrate, through an imprinting process. The integrated elastomer substrate was capable of maintaining the uniform liquid crystal (LC) cell gap and promoting homeotropic LC alignment without any surface treatment. The monolithic approach reported herein will provide a key component for 3D displays with enhanced portability through a more than 40% weight reduction compared with the conventional integral-imaging method.

• Proceedings of the Materials Research Society of Korea Conference
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• 2007.11a
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• pp.96.2-96.2
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• 2007

• The Journal of the Acoustical Society of Korea
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• v.22 no.3
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• pp.208-216
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• 2003

In one dimensional linear array type piezoelectric ultrasonic transducers widely used for medical diagnosis, the acoustic cross talk caused by the structural acoustic coupling between the adjacent piezoelectric elements reduces significantly their performance. In the study, we have proposed an acoustic wall to reduce the acoustic cross talk by wave propagation through the surface the transducer which can not be prevented by conventional kerf and have analyzed using a finite element method the acoustic cross talk level with respect to the shape, size and materials of the acoustic wall mounted on a convex one dimensional piezoelectric ultrasonic transducer. We expect that the simulated results provide us with a valuable information to make an optimized design of the way type ultrasonic transducer minimizing the acoustic cross talk level.

• Journal of IKEEE
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• v.26 no.1
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• pp.129-132
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• 2022

In this paper, a technique for optimizing the sub-array system structure that can minimize the side lobe level of the phased-array antenna is proposed. Optimization of the proposed array antenna structure is to adjust the spacing between sub-arrays and sub-arrays by using a hexagonal array structure of one sub-array and a hexagonal sub-array for six hexagonal arrays, and thus the entire phased array antenna system of the radiation pattern was optimized. Compared to the 2-dimensional planar antenna system, the proposed technique maintains a gain of 24.3 dBi and a half-power beam-width of 8.46 degrees without change, and only reduces -3.4 dB and -6.5 dB in the x-axis and y-axis directions, respectively.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.9
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• pp.1115-1124
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• 1988

A two-dimensional systolic array for fast Fourier transform, which has a regular and recursive VLSI architecture is presented. The array is constructed with identical processing elements (PE) in mesh type, and due to its modularity, it can be expanded to an arbitrary size. A processing element consists of two data routing units, a butterfly arithmetic unit and a simple control unit. The array computes FFT through three procedures` I/O pipelining, data shuffling and butterfly arithmetic. By utilizing parallelism, pipelining and local communication geometry during data movement, the two-dimensional systolic array eliminates global and irregular commutation problems, which have been a limiting factor in VLSI implementation of FFT processor. The systolic array executes a half butterfly arithmetic based on a distributed arithmetic that can carry out multiplication with only adders. Also, the systolic array provides 100% PE activity, i.e., none of the PEs are idle at any time. A chip for half butterfly arithmetic, which consists of two BLC adders and registers, has been fabricated using a 3-um single metal P-well CMOS technology. With the half butterfly arithmetic execution time of about 500 ns which has been obtained b critical path delay simulation, totla FFT execution time for 1024 points is estimated about 16.6 us at clock frequency of 20MHz. A one-PE chip expnsible to anly size of array is being fabricated using a 2-um, double metal, P-well CMOS process. The chip was layouted using standard cell library and macrocell of BLC adder with the aid of auto-routing software. It consists of around 6000 transistors and 68 I/O pads on 3.4x2.8mm\ulcornerarea. A built-i self-testing circuit, BILBO (Built-In Logic Block Observation), was employed at the expense of 3% hardware overhead.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.7 no.2
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• pp.147-156
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• 1996

In this paper we proposed a beam steering equation for the planar slotted waveguide array antenna. The tilt angle measured from the rotating axis and the aperture distribution of the antenna were the most important factors for the beam steering. From the equation, we calculated the frequency and phase distribution of the aperture for any desired beam direction. And we developed a high speed control algorithm delivering the phase data to the phase shifters of a one-dimensional phased array antenna. To reduce complexity of the control circuit and the phase delivery time, we proposed the serial phase repeating method. Because of its simplicity, we expect it can be useful for a large 2- dimensional fully phased array antenna.