• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.10
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• pp.889-894
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• 2007

We investigated the quench velocity of superconducting fault current limiter (SFCL) dependent on the source voltage. $YBa_2Cu_3O_7$ (YBCO) thin film was used as the current limiting element for SFCL. The analysis on the quench velocity of SFCL is essential to determine the capacity of circuit breaker (CB) or coordinate with CB. Generally, the quench velocity of SFCL is related with the short-circuit current. To change the short-circuit current, in this paper, the amplitude of the power source voltage is adjusted. Through the fault current limiting experiments, the quench velocity of SFCL was confirmed to increase fast as the source voltage increased. On the other hand, the peak limited current was shown to increase with steady rate of increase.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.10
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• pp.469-475
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• 2003

Resistive leakage current flowing ZnO blocks increases with its ages, which is an important indicator of arrester deterioration. However, a complicated circuitry is essential to measure the resistive leakage current included in the total leakage current, and the difficult handling of the measurement makes few applications to the fields. In this paper, we propose a resistive leakage current measurement device which is composed of a current detection circuit and an analysis program operated on a microprocessor. The device samples the input leakage current waveform digitally, and discriminate the zero-cross and the peak point of the waveform to analyze the current amplitude vs. phase. The capacitive leakage current is then eliminated from the total leakage current by using an algorithm to extract the resistive leakage current only. Also, the device can be operated automatically and manually to analyze the resistive leakage current even when the leakage current waveform is distorted due to various types of arrester deterioration. To estimate the performance of the device, we carried out a test on ZnO blocks and lightning arresters. From the results, it is confirmed that the device could analyze most parameters needed for the arrester diagnostics such as total leakage current. resistive leakage current, and the $3^rd$ harmonic leakage current.

• Journal of the korean society of oceanography
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• v.32 no.1
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• pp.1-7
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• 1997

Surface current fields in the eastern East China Sea (ECS) were constructed by analyzing trajectories of 58 satellite-tracked surface drifters released during 1991-1996. Composite trajectories and 20-minute-by-20-minute box-averaged current vectors show that the basic current pattern composes of: the Kuroshio main stream, which turns eastward toward the Tokara Strait; a northward branch current of the Kuroshio on the ECS outer shelf deeper than 100 m; and an anticyclonic circulation in the northern Okinawa Trough west of Kyushu. The northward branch current sharply changes its direction to the northeast when it crosses a line connecting Cheju Island, Korea and Goto Islands, Japan. The basic pattern of current field changes slightly from winter to summer, and the main axis of the Tsushima Current in the Korea Strait is found to shift seasonally. The drifter experiment does not support the claim that the Yellow Sea Warm Current is separated from the northward branch current on the outer shelf southeast of Cheju Island. We suggest that the use of the term 'Tsushima Current' be limited to the northeast channel flow in the Korea Strait. The new term 'Kuroshio Branch Current' is suggested for the northward branch current on the outer shelf south of Cheju-do, which is separated from the Kuroshio.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.5
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• pp.761-766
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• 2008

This paper describes a compensation algorithm for a measurement voltage transformer (VT) based on the hysteresis characteristics of the core. The error of the VT is caused by the voltages across the primary and secondary windings. The latter depends on the secondary current whilst the former depends on the primary current, i.e. the sum of the exciting current and the secondary current. The proposed algorithm calculates the voltages across the primary and secondary windings and add them to the measured secondary voltage for compensation. To do this, the primary and secondary currents should be estimated. The secondary current is obtained directly from the secondary voltage and used to calculate the voltage across the secondary winding. For the primary current, in this paper, the exciting current is decomposed into the two currents, i.e. the core-loss current and the magnetizing current. The core-loss current is obtained by dividing the primary induced voltage by the core-loss resistance. The magnetizing current is obtained by inserting the flux into the flux-magnetizing current curve. The calculated voltages across the primary and secondary windings are added to the measured secondary current for compensation. The proposed compensation algorithm improves the error of the VT significantly.

• Progress in Superconductivity
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• v.11 no.1
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• pp.19-24
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• 2009

Among the various types of fault current limiters, superconducting fault current limiters could be the most preferable choice for high voltage electric power systems owing to the remarkable current limiting characteristics of superconductors. But, there have been no commercial superconducting fault current limiters which were installed into actual electric power systems until these days due to some remained technical and economical problems. Thus, in order to promote the development and application of the superconducting fault current limiters into real field, it is essential to understand the power utilities’ requirements for their networks and also suitable test method and some specifications should be prepared. This paper focuses on the matters of test requirements and standardization issues that should be prepared for commercialization of superconducting fault current limiters. The unique current limiting characteristics of superconducting fault current limiters were investigated and related other standards including circuit breakers, transformers, reactors, power fuse, and fused circuit breakers were compared to setup the basis of novel specification of superconducting fault current limiters. Furthermore, required essential test procedures for superconducting fault current limiters were suggested.

• Proceedings of the KSR Conference
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• 2007.05a
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• pp.1694-1700
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• 2007

In the electrified section, both of return current and signal current are flowing in the same rail in common. But signal current shall be allowed to flow in the specific track circuit and not in the other circuit while the traction return current shall come back to power sub-station. This paper presents measuring system that use both sensor and antenna. The aim of the system is to achieve the difference in current between the two rails and the presence of trimming capacitors. In order to improve the transmission level, trimming capacitors are connected between the two rails at constant spacing. To maintain the balance of traction return current, rails of both sides may be jointed by the so-called SVPMM. The traction return current is sometimes unbalanced owing to the ill-contact of SVPMM. In this paper, we propose a diagnosis method based on a short-circuited current(Icc), trimming capacitors and traction return current measured by Korail inspection vehicles. Whether Icc is good or bad depends not only on the presence of trimming capacitors but also on the unbalance of the traction return current.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.2
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• pp.173-183
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• 1996

In this paper, a new structure that can do fault detection and location of digial logic circuits more efficiently using current testing techniques is proposed. In the conventional method, observation point for steady state power supply current was only one, but in the proposed method more fault classes are divided for fault detection and location through the ovservation of steady state power supply current at two points. Also, it is shown that this structure can be easily applied in detection of stuck-open fault which is not easy to do testing with conventional current testing techniques. In the presented mehtod, an extra trasnistor is used, and current path is made compulsorily in the CMOS circuits in which no current path can be established in steady state, then it can be known that stuck-open tault is in the MOS transistor on the considering current path, if this path disappears due to stuck-open fault. The validity and the effectiveness is shwon, thorugh the SPICE simulation of circuits with fault and the current path search experiment using current path search program based on transistor short model wirtten in C language on SUN sparc workstation.

• Journal of Ocean Engineering and Technology
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• v.35 no.6
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• pp.446-456
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• 2021

To build an environment facility of a large-scale ocean basin, various detailed reviews are required, but it is difficult to find data that introduces the related research or construction processes on the environment facility. The current generator facility for offshore structure safety evaluation tests should be implemented by rotating the water of the basin. However, when the water in the large basin rotates, relatively large flow irregularities may occur and the uniformity may not be adequate. In this paper, design and review were conducted to satisfy the performance goals of the DOEB through computational numerical analysis on the shape of the waterway and the flow straightening devices to form the current in the large tank. Based on this, the head loss, which decreases the flow rate when the large tank water rotates through the water channel, was estimated and used as the pump capacity (impeller) design data. The impeller of the DOEB current generator was designed through computational numerical analysis (CFD) based on the lift surface theory from the axial-type impeller shape for satisfying the head loss of the waterway and maximum current velocity. In order to confirm the performance of the designed impeller system, the flow rate and flow velocity performance were checked through factory test operation. And, after installing DOEB, the current flow rate and velocity performance were reviewed compare with the original design target values. Finally, by measuring the current velocity of the test area in DOEB formed through the current generator, the spatial current distribution characteristics in the test area were analyzed. Through the analysis of the current distribution characteristics of the DOEB test area, it was confirmed that the realization of the maximum current velocity and the average flow velocity distribution, the main performance goals in the waterway design process, were satisfied.

• Journal of Power Electronics
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• v.16 no.2
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• pp.769-777
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• 2016

This work focuses on current sharing between punch-through insulated gate bipolar transistors (IGBTs) connected in parallel and evaluates the mechanisms that allow overall current balancing. Two different control strategies are presented. These strategies are based on the modification of transistor gate-emitter control voltage V_GE by using an active gate driver circuit. The first strategy relies on the calculation of the average value of the current flowing through all parallel-connected IGBTs. The second strategy is proposed by the authors on the basis of a current cross reference control scheme. Finally, the simulation and experimental results of the application of the two current sharing control algorithms are presented.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.332-333
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• 2018

This paper presents an advanced abnormal over-current protection with $SuperFET^{(R)}$ 800V MOSFET in Flyback converter. In advanced abnormal over-current protection, digital pattern generator is proposed to detect a steep di/dt current condition when secondary rectifier diode or the transformer is shorted. If current sensing signal is larger than current limit during consecutive switching cycle, Gate signal will be stopped for 7 internal switching periods. If the abnormal over-current maintains pattern, the controller goes into protection mode. The Advanced over-current protection has been implemented in a 0.35um BCDMOS process (ON Semiconductor process).