• Journal of the Korean Ceramic Society
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• v.40 no.9
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• pp.832-836
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• 2003

Multi-layer ceramic composites were prepared by tape casting followed by hot pressing using silicon nitride layer with silicon nitride whiskers, silicon nitride layer with silicon carbide particles and boron nitride-alumina layer. The whiskers were aligned during the casting. As the whisker content of the silicon nitride layer was increased up to 10 wt％, the flexural strength of the multi-layer composite was increased. However, further increase of the whisker content in the layer resulted in a rapid decrease of the strength of the composite. The results suggest that the strength of multi-layer ceramic composite showing non-catastrophic failure behavior can be significantly improved by incorporating the aligned whiskers in the layers.

• Electrical & Electronic Materials
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• v.9 no.8
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• pp.789-798
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• 1996

The double nitride layer Metal Nitride Oxide Semiconductor(MNOS) structures were fabricated by variating both gas ratio and nitride thickness, and by duplicating nitride deposited and one nitride layer MNOS structure to improve nonvolatile memory characteristics of MNOS structures by Low Pressure Chemical Vapor Deposition(LPCVD) method. The nonvolatile memory characteristics of write-in, erase, memory retention and degradation of Bias Temperature Stress(BTS) were investigated by the homemade automatic .DELTA. $V_{FB}$ measuring system. In the trap density double nitride layer structures were higher by 0.85*10$^{16}$ $m^{-2}$ than one nitride layer structure, and the AVFB with oxide field was linearly increased. However, one nitride layer structure was linearly increased and saturated above 9.07*10$^{8}$ V/m in oxide field. In the erase behavior, the hole injection from silicon instead of the trapped electron emission was observed, and also it was highly dependent upon the pulse amplitude and the pulse width. In the memory retentivity, double nitrite layer structures were superior to one nitride layer structure, and the decay rate of the trapped electron with increasing temperature was low. At increasing the number on BTS, the variance of AVFB of the double nitride layer structures was smaller than that of one nitride layer structure, and the trapped electron retention rate was high. In this paper, the double nitride layer structures were turned out to be useful in improving the nonvolatile memory characteristics.

• Electrical & Electronic Materials
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• v.7 no.3
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• pp.231-235
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• 1994

The multi-dielectric layer $SiO_2$/$Si_3{N_4}$/$SiO_2$ (ONO) is used to improve charge retention and to scale down the memory device. The nitride layer of MNOS device is oxidize to form ONO system. During the oxidation of the nitride layer, the change of thickness of nitride layer and generation of interface state between nitride layer and top oxide layer occur. In this paper, effects of oxidation of the nitride layer is studied. The decreases of the nitride layer due to oxidation and trapping characteristics of interface state of multi layer dielectric film are investigated through the C-V measurement and F-N tunneling injection experiment using SONOS capacitor structure. Based on the experimental results, carrier trapping model for maximum flatband voltage shift of multi layer dielectric film is proposed and compared with experimental data. As a results of curve fitting, interface trap density between the top oxide and layer is determined as being $5{\times}10^11$~$2{\times}10^12$[$eV^1$$cm^2$].

• Electrical & Electronic Materials
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• v.7 no.2
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• pp.145-151
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• 1994

The multi-dielectric layer SiOz/Si3N4/SiO2(ONO) is used to scale down the memory device. In this paper, the change of composition in ONO layer due to the process condition and the conduction mechanism are observed. The composition of the oxide film grown through the oxidation of nitride film is analyzed using auger electron spectroscopy(AES). AES results show that oxygen concentration increases at the interface between oxide and nitride layers as the thickness -of the top oxide layer increases. Results of I-V measurement show that the insulating properties improve as the thickness of the top oxide layer increases. But when the thickness of the nitride layer decreases below 63.angs, insulating peoperties of film 28.angs. of top oxide and film 35.angs. turn over showing that insulating property of film 28.angs. of top oxide is better than that of film 35.angs. of top oxide. This phenomenon of turn over is thought as the result of generation of surface state due to oxygen flow into nitride during oxidation process. As the thickness of the top oxide and nitride increases, the electrical breakdown field increases, but when the thickness of top oxide reaches 35.angs, the same phenomenon of turn over occurs. Optimum film thickness for scaled multi-layer dielectric of memory device SONOS is estimated to be 63.angs. of nitride layer and 28.angs. of top oxide layer. In this case, maximum electrical breakdown field and leakage current are 18.5[MV/cm] and $8{\times}{10^-12}$[A], respectively.

• Journal of the Korean Ceramic Society
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• v.39 no.7
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• pp.622-627
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• 2002

Multi-layer composites consisting of silicon nitride, silicon nitride-silicon carbide and boron nitride-alumina layers were prepared fly stacking the corresponding ceramic tapes. The composites demonstrated self-diagnostic capability and non-catastrophic failure behavior. The composites consisting of many thin layers exhibited high strength and stepwise increase of the electrical resistance during the flexure test. The strength of the composite with too thick silicon nitride layers was low and the electrical resistance was abruptly increased to the detection limit of the digital multi-meter during the test. An extensive crack branching was observed in the weak (BN + Al$_2$O$_3$)layer.

• Journal of Mechanical Science and Technology
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• v.17 no.11
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• pp.1638-1649
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• 2003

A study is made on the characterization of damage tolerance by spherical indentation in hardly coated layer structure with modest elastic modulus mismatch. A hard silicon nitride is prepared for the coating material and silicon nitride with 5wt% of boron nitride composites for underlayer. Hot pressing to eliminate the effect of interface delamination during the fracture makes strong interfacial bonding. The elastic modulus mismatch between the layers is not only large enough to suppress the surface crack initiation from the coating layer but sufficiently small to prevent the initiation of radial crack from the interface. The strength degradation of the layer structure after sphere contact indentation does not significantly occur, while the degradation of silicon nitride-boron nitride composite is critical at a high load and high number of contacts.

• Korean Journal of Materials Research
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• v.12 no.6
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• pp.447-451
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• 2002

Pulsed DC-plasma nitriding has been applied to form nitride layer having only a diffusion layer. The discharge current with the variation of discharge gases is proportional to the intensity of $N_2^+$ peak in optical emission spectroscopy during the plasma nitriding. The discharge current, microhardness in surface of substrate and depth of nitride layer increased with the ratio of $N_2\;to\;H_2$ gas in discharge gases. When the ratio of $N_2\;to\;H_2$ is lower than 60% in the discharge gases, high microhardness value of 1100Hv nitride layer which contains no compound layer has been formed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.2
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• pp.85-90
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• 2012

In this paper, we compared and analyzed 3D silicon-oxide-nitride-oxide-silicon (SONOS) multi layer flash memory devices fabricated on nitride or oxide layer, respectively. The device fabricated on nitride layer has inferior electrical properties than that fabricated on oxide layer. However, the device on nitride layer has faster program / erase speed (P/E speed) than that on the oxide layer, although having inferior electrical performance. Afterwards, to find out the reason why the device on nitride has faster P/E speed, 1/f noise analysis of both devices is investigated. From gate bias dependance, both devices follow the mobility fluctuation model which results from the lattice scattering and defects in the channel layer. In addition, the device on nitride with better memory characteristics has higher normalized drain current noise power spectral density ($S_{ID}/I^2_D$>), which means that it has more traps and defects in the channel layer. The apparent hooge's noise parameter (${\alpha}_{app}$) to represent the grain boundary trap density and the height of grain boundary potential barrier is considered. The device on nitride has higher ${\alpha}_{app}$ values, which can be explained due to more grain boundary traps. Therefore, the reason why the devices on nitride and oxide have a different P/E speed can be explained due to the trapping/de-trapping of free carriers into more grain boundary trap sites in channel layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.344.1-344.1
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• 2016

Recently, graphene has shown great characteristic of electrical conductivity, strength, and elasticity. However, due to edge unstable and metallic properties, it is difficult to use as a semiconductor devices. The solution of such problems has been sought a way to use the boron nitride in a stacked layer structure. By graphene and boron nitride stacked layer structure on silicon substrate, the electron mobility is improved and deteriorated results in semiconductor properties. In this study, to make layered structure, we developed direct synthesis method for graphene on boron nitride. By using Raman technique, the directly stacked layer structure is in good agreement with measurements on each of the attributes.

• Journal of the Korean institute of surface engineering
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• v.34 no.3
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• pp.231-239
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• 2001

The structure and composition of Cr-nitrides formed on an electroplated hard Cr layer during an ionnitriding process was analyzed, and the growth kinetics of the Cr-nitrides was examined as a function of the ion-nitriding temperature and time in order to establish a computer simulation model prediction the growth behavior of the Cr-nitride layer. The Cr-nitrides formed during the ion-nitriding at $550~770^{\circ}C$ were composed of outer CrN and inner $Cr_2$N layers. A nitrogen diffusion model in the multi-layer based on fixed grid FDM (Finite Difference Method) was applied to simulate the growth kinetics of Cr-nitride layers. By measuring the thickness of each Cr-nitride layer as a function of the ion-nitriding temperature and time, the activation energy for growth of each Cr-nitride was determined; 82.26 KJ/mol for CrN and 83.36 Kj/mol for $Cr_2$N. Further, the nitrogen diffusion constant was determined in each layer; $9.70$\times$10^{-12}$ /$m^2$/s in CrN and $2.46$\times$10^{-12}$ $m^2$/s in $Cr_2$N. The simulation on the growth kinetics of Cr-nitride layers was in good agreements with the experimental results at 550~72$0^{\circ}C$.