• Journal of Sensor Science and Technology
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• v.28 no.5
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• pp.329-333
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• 2019

Solution-processed oxide thin-film transistors (TFTs) have garnered great attention, owing to their many advantages, such as low-cost, large area available for fabrication, mechanical flexibility, and optical transparency. Negative bias stress (NBS)-induced instability of sol-gel IGZO TFTs is one of the biggest concerns arising in practical applications. Thus, understanding the bias stress effect on the electrical properties of sol-gel IGZO TFTs and proposing an effective recovery method for negative bias stressed TFTs is required. In this study, we investigated the variation of transfer characteristics and the corresponding electrical parameters of sol-gel IGZO TFTs caused by NBS and positive bias recovery (PBR). Furthermore, we proposed an effective PBR method for the recovery of negative bias stressed sol-gel IGZO TFTs. The threshold voltage and field-effect mobility were affected by NBS and PBR, while current on/off ratio and sub-threshold swing were not significantly affected. The transfer characteristic of negative bias stressed IGZO TFTs increased in the positive direction after applying PBR with a negative drain voltage, compared to PBR with a positive drain voltage or a drain voltage of 0 V. These results are expected to contribute to the reduction of recovery time of negative bias stressed sol-gel IGZO TFTs.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2009.05a
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• pp.130-131
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• 2009

AIP(arc ion plating)방법과 마그네슘 스퍼터링(DC reactive magnetron sputtering) 방법을 결합시킨 하이브리드 코팅 시스템으로 Cr-Si-N 코팅막을 합성하였다. 고분해능 TEM 및 SEM 분석들로부터 negative bias voltage에 따른 미세구조의 영향을 나타내었다. negative bias voltage의 증가에 따라 columnar microstructure가 amorphous microstructure로 변화하였다. bias voltage effect에 의해 Cr-Si-N 코팅막내 입자의 크기가 미세해지고 나노 복합체를 잘 형성하였다.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2009.10a
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• pp.159-160
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• 2009

AIP(arc ion plating)방법으로 CrN 코팅막을 합성하였다. 고분해능 SEM과 AFM 분석들로부터 negative bias voltage에 따른 미세구조의 영향을 나타내었다. negative bias voltage의 증가에 따라 columnar microstructure가 amorphous microstructure로 변화하였다. bias voltage effect에 의해 CrN 코팅막내 입자의 크기가 미세해지고 나노 복합체를 잘 형성하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.461-463
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• 1999

In this paper, we have systematically investigated the variation of electrical characteristics with back-gate bias of n-channel SOI MOSFET\\`s. When positive bias is applied back-gate surface is inverted and back channel current is increased. When negative bias is applied back-gate surface is accumulated but it does not affect to the electrical characteristics.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.728-731
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• 2009

A negative waveform having inverted polarity of conventional waveform during reset and sustain periods was proposed to improve the driving characteristics. In order to control the negative wall-charge distribution, a positive bias on the scan electrode was applied during reset period. Compared to 0 V scan-bias condition, at 8 V scan-bias the formative time lag was improved about 23.95 % and the average time lag was improved about 14.91 %. All experiments were performed with the 42-inch PDP module in XGA resolution.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.953-956
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• 2009

We have investigated the effect of light on amorphous silicon thin film transistors based photo-sensor applications. We have analyzed the instability caused by electrical gate bias stresses under the light illumination and the effect of photo-induced quasi-annealing on the instability. Threshold voltage ($V_{TH}$) under the negative gate bias stress with light illumination was more decreased than that under the negative gate bias stress without light illumination even though $V_{TH}$ caused by the light-induced stress without negative gate bias was shifted positively. These results are because the increase of carrier density in a channel region caused by the light illumination has the enhanced effect on the instability caused by negative gate bias stress. The prolonged light illumination led to the recovery of shifted VTH caused by negative gate bias stress under the light illumination due to the recombination of trapped hole charges.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1440-1441
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• 2006

In this study, we synthesized CNTs(carbon nanotubes) on the glass substrate by microwave plasma enhanced chemical vapor deposition (MPECVD), Effect of bias voltage on the grown behavior and morphology of CNTs were investigated. Recently, it has been proposed that aligned CNTs can also be achieved by the application of electric bias to the substrate during growth, the first time reported the bias effect such that the nanotube alignment occurred only when a positive bias was applied to the substrate whereas no aligned growth occurred under a negative bias and no tube growth was observed without bias. On the country, several researchers reported some different observations that aligned nanotubes could also be grown under negative substrate biases. This discrepancy as for the effect of positive and negative bias may indicate that the bias effect is not fully understood yet. The glass and Si wafers were first deposited with TiN buffer layer by r.f sputtering method, and then Ni catalyst same method, The thickness of TiN and Ni layer were 200 nm and 60 nm, respectively. The main process parameters include the substrate bias (0 to - 300 V), and deposition pressure (8 to 20 torr).

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.15 no.5
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• pp.198-201
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• 2005

Carbon nanofibers were formed on silicon substrate which was applied by negative direct current (DC) bias voltage using microwave plasma-enhanced chemical vapor deposition method. Formation of carbon nanofibers were varied according to the variation of the applied bias voltage. At -250 V, we found that the growth direction of carbon nanofibers followed the applied direction of the bias voltage. Based on these results, we suggest one of the possible techniques to control the growth direction of the carbon nanofibers.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1258-1261
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• 2005

The ramp type bias voltage applied to the common electrode during a reset-period is newly proposed to lower the background luminance and to improve the address discharge characteristics in AC-PDP. The positive ramp bias voltage is applied during the ramp-up period, whereas the negative ramp bias voltage is applied during the ramp-down period. The effects of the voltage slopes in both the positive and negative ramp bias voltages on the background luminance and address voltage characteristics are examined intensively. It is observed that the optimized positive and negative ramp bias voltages applied to the common electrode during the ramp-period can lower the background luminance and also enhance the address discharge characteristics of the AC-PDP.

• Asia Marketing Journal
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• v.26 no.1
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• pp.23-30
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• 2024

Firms often engage in manipulating online reviews as a promotional activity to influence consumers' evaluation on their products. With the prevalence of the promotional activities, consumers may notice and discount the reviews generated by the promotional activities. Discounting the firm-generating reviews may cause systematic measurement errors in the valence variable and lead to a negative bias when estimating the effect of consumers' organic reviews on demand. To correct the bias, this study proposes including product-specific bias-correction terms representing the proportion of extreme reviews in analysis. For illustration, the proposed method is applied to a demand model for data of movies released in South Korea. The results confirm a negative bias in the estimate of the valence sensitivity of demand. The negative bias potentially leads to an underestimation of the magnitude of the contagion effect through social interactions, a key component of evaluating the value of a satisfied consumer.