• Title/Summary/Keyword: NCAP

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Design of Small-Area MTP Memory Based on a BCD Process (BCD 공정 기반 저면적 MTP 설계)

  • Soonwoo Kwon;Li Longhua;Dohoon Kim;Panbong Ha;Younghee Kim
    • Journal of IKEEE
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    • v.28 no.1
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    • pp.78-89
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    • 2024
  • PMIC chips based on a BCD process used in automotive semiconductors require multi-time programmable (MTP) intellectual property (IP) that does not require additional masks to trim analog circuits. In this paper, MTP cell size was reduced by about 18.4% by using MTP cells using PMOS capacitors (PCAPs) instead of NMOS capacitors (NCAPs) in MTP cells, which are single poly EEPROM cells with two transistors and one MOS capacitor for small-area MTP IP design. In addition, from the perspective of MTP IP circuit design, the two-stage voltage shifter circuit is applied to the CG drive circuit and TG drive circuit of MTP IP design, and in order to reduce the area of the DC-DC converter circuit, the VPP (=7.75V), VNN (=-7.75V) and VNNL (=-2.5V) charge pump circuits using the charge pumping method are placed separately for each charge pump.