• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1137-1147
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• 1997

I propose a RZETA network consisted of switching elements(SEs) that have regular links and alternate links. A modified Zeta nework used for the RZETA network's regular links and a MIN used for its alternate links are generated using the graph theory. The RZETA network is driven from merging the formaer and latter MINs. A necessary and sufficient condition for modified Zeta network to be a nonblocking network is also presented. This condition is a ufficient condition for RZETA network with a faulty link or a faulty SE to be nonblocked. Performance of the RZETA network is analyzed by modification of the model of 2-dilated Banyan network and its performance is compared with existing redundant path networks, when packet arrival rate of each source is 1.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.5
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• pp.71-78
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• 1989

To estimate a performance of MIM's a network modeling method and a simulation algorithm are proposed, and this algorithm is programmed by C language. Especially, state variables are defined to process many concurrent requests ar inputs and a data structure, which contains network informations, is proposed to keep track of each stage. This simulation can be applied to computers which are designed for sequential processing. This method can be used to estimate a performance of MIN's instead of using complex mathematical method.

• The KIPS Transactions:PartA
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• v.8A no.2
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• pp.99-106
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• 2001

In this paper, we study fault-tolerant multicasting in multicomputers based on multistage interconnection networks (MIN’s). In addition to one-to-one routing among processing nodes, efficient multicasting has an important effect on the performance of multicomputers. This paper presents a multicasting algorithm to tolerate faulty switching elements. The proposed algorithm uses the cube encoding scheme to represent multicast destinations in MIN, and is based on a recursive scheme in order to bypass faults. This algorithm can route any multicast message to its own destinations in only two passes through the MIN containing several faulty switching elements. Moreover, we prove the correctness of our algorithm by exploiting well-known nonblocking property of MIN.

• Journal of KIISE:Information Networking
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• v.34 no.3
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• pp.203-217
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• 2007

In this paper, a performance evaluation model of Networks with the multiple-buffered crossbar switches is proposed and examined. Buffered switch technique is well known to solve the data collision problem of the switch networks. The characteristic of a network with crossbar switches is determined by both the connection pattern of the switches and the limitation of data flow in a each switch. In this thesis, the evaluation models of three different networks : Multistage interconnection network, Fat-tree network, and other ordinary communication network are developed. The proposed evaluation model is developed by investigating the transfer patterns of data packets in a switch with output-buffers. Two important parameters of the network performance, throughput and delay, are evaluated. The proposed model takes simple and primitive switch networks, i.e., no flow control and drop packet, to demonstrate analysis procedures clearly. It, however, can not only be applied to any other complicate modern switch networks that have intelligent flow control but also estimate the performance of any size networks with multiple-buffered switches. To validate the proposed analysis model, the simulation is carried out on the various sizes of networks that uses the multiple buffered crossbar switches. It is shown that both the analysis and the simulation results match closely. It is also observed that the increasing rate of Normalized Throughput is reduced and the Network Delay is getting bigger as the buffer size increased.

• The Journal of the Korea Contents Association
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• v.4 no.4
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• pp.189-196
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• 2004

Most of the recent researches for ATM switches have been based on multistage interconnection network known as regularity and self-routing property. These networks can switch packets simultaneously and in parallel. However, they are blocking networks in the sense that packet is capable of collision with each other Mainly Banyan network have been used for structure. There are several ways to reduce the blocking or to increase the throughput of banyan-type switches: increasing the internal link speeds, placing buffers in each switching node, using multiple path, distributing the load evenly in front of the banyan network and so on. Therefore, this paper proposes the use of recirculating shuffle-exchange network to reduce the blocking and to improve hardware complexity. This structures are recirculating shuffle-exchange network as simplified in hardware complexity and Rank network with tree structure which send only a packet with highest priority to the next network, and recirculate the others to the previous network. after it decides priority number on the Packets transferred to the same destination, The transferred Packets into banyan network use the function of self routing through decomposition and composition algorithm and all they arrive at final destinations. To analyze throughput, waiting time and packet loss ratio according to the size of buffer, the probabilities are modeled by a binomial distribution of packet arrival. If it is 50 percentage of load, the size of buffer is more than 15. It means the acceptable packet loss ratio. Therefore, this paper simplify the hardware complexity as use of recirculating shuffle-exchange network instead of bitonic sorter.