• Journal of Power Electronics
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• v.19 no.2
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• pp.344-352
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• 2019

To achieve high efficiency and reliability, multiphase interleaved converters with coupled inductors have been widely applied. In this paper, a coupled inductor design method for 2-phase interleaved boost converters is presented. A new area product equation is derived to select the proper core size. The wire size, number of turns and air gap length are also determined by using the proposed coupled inductor design method. Finally, the validity of the proposed coupled inductor design method is confirmed by simulation and experimental results obtained from a design example.

• Journal of Power Electronics
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• v.13 no.3
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• pp.339-348
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• 2013

Multiphase dc-dc converters are widely used in modern power electronics applications due to their advantages over single-phase converters. Such advantages include reduced current stress in both the switching devices and passive elements, reduced output current ripple, and so on. Although the output current ripple of a converter can be significantly reduced by virtue of the interleaving effect, the inductor current ripple cannot be reduced even with the interleaving PWM method. One way to solve this problem is to use a coupled inductor. However, care must be taken in designing the coupled inductor to maximize its performances. In this paper, a detailed analysis of a coupled inductor is conducted and the effect of a coupled inductor on current ripple reduction is investigated extensively. From this analysis, a UU core based coupled inductor structure is proposed to maximize the performance of the coupled inductor.

• Journal of Power Electronics
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• v.15 no.1
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• pp.131-145
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• 2015

The voltage-source inverters (VSI) supplying a motor drive are prone to open transistor faults. To address this issue in fault-tolerant drives applicable to electric vehicles, a new open transistor fault diagnosis (FD) method is presented in this paper. According to the proposed method, in order to define the FD index, the phase angle of the converter output current is estimated by a simple trigonometric function. The proposed FD method is adaptable, simple, capable of detecting multiple open switch faults and robust to load operational variations. Keeping the FD in mind as a mandatory part of the fault tolerant control algorithm, the FD block is applied to a five-phase converter supplying a multiphase fault-tolerant PM motor drive with non-sinusoidal unbalanced current waveforms. To investigate the performance of the FD technique, the fault-tolerant sliding mode control (SMC) of a five-phase brushless direct current (BLDC) motor is developed in this paper with the embedded FD block. Once the theory is explained, experimental waveforms are obtained from a five-phase BLDC motor to show the effectiveness of the proposed FD method. The FD algorithm is implemented on a field programmable gate array (FPGA).

• Journal of international Conference on Electrical Machines and Systems
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• v.3 no.1
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• pp.88-92
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• 2014

This paper presents an application of a multiphase interleaved converter in tracking maximum power points (MPPs) of a photovoltaic (PV) panel regardless of environmental variations. Maximum power from the panel was extracted by means of the well-known the perturb-and-observe (P&O) method. The switching control technique used an interleaving scheme based on multi-unit synchronization. The converter performed harmonic attenuation without affecting the tracking speed. This approach is straightforward, reliable and inexpensive, and could be applied to any higher number of switching cells without difficulty.

• Journal of Power Electronics
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• v.19 no.2
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• pp.475-486
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• 2019

This paper proposes the modulation and control of a three-to-six-phase matrix converter with an asymmetrical six-phase output. The matrix converter (MC) outputs consist of two sets of three-phase spatially shifted by $30^0$, where the two sets have two isolated neutrals. The space vector approach is considered for the modeling and subsequent modulation of the three-to-six phase MC. The intelligent selection of voltage space vectors is made to synthesize the reference voltages and to obtain a sinusoidal output. The dwell times of selected voltage space vectors are adjusted in such a way that the effect of the second and the third auxiliary plane vectors (i.e., x1-y1, and x2-y2) are nullified. To achieve the maximum output voltage gain and to ensure that no reactive power is drawn from the utility supply, the input side power factor is maintained at unity. Nevertheless, the source side power factor is controllable. The modulation technique is implemented in dSPACE working in conjunction with a FPGA. Hardware results that validate the proposed control algorithm are discussed.