• Title/Summary/Keyword: Multi-stacked

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Floating Voltage Stacked LED Driver for Low Voltage Stress and Multi-channel Current Balancing (저 전압스트레스 및 다채널 전류 평형을 위한 Floating 전압 스택형 단일스위치 LED 구동회로)

  • Hwang, Won-Sun;Hwang, Sang-Soo;Kang, Jeong-Il;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.2
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    • pp.122-129
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    • 2015
  • In this study, we propose a low voltage stress and cost-effective light emitting diode (LED) driver capable of multi-channel current balancing. Conventional LED drivers require as many boost converters as the number of LED channels, whereas the proposed LED driver requires only one buck converter and several balancing capacitors instead of several expensive boost converters. Additionally, while the components of the boost converter have high voltage stress and depend on the LED driving voltage, components of the proposed driver have about one-half of the voltage stress across all components. The proposed driver exhibits high reliability and cost effectiveness because it only uses few DC blocking capacitors with no additional active devices to balance the current of multi-channel LEDs. The proposed driver exhibits high reliability and cost effectiveness. The validity of the proposed driver is confirmed through a theoretical analysis. An explanation of the design considerations and experimental results were obtained using a prototype applicable to a 46" LED-TV.

CMP cross-correlation analysis of multi-channel surface-wave data

  • Hayashi Koichi;Suzuki Haruhiko
    • Geophysics and Geophysical Exploration
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    • v.7 no.1
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    • pp.7-13
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    • 2004
  • In this paper, we demonstrate that Common Mid-Point (CMP) cross-correlation gathers of multi-channel and multi-shot surface waves give accurate phase-velocity curves, and enable us to reconstruct two-dimensional (2D) velocity structures with high resolution. Data acquisition for CMP cross-correlation analysis is similar to acquisition for a 2D seismic reflection survey. Data processing seems similar to Common Depth-Point (CDP) analysis of 2D seismic reflection survey data, but differs in that the cross-correlation of the original waveform is calculated before making CMP gathers. Data processing in CMP cross-correlation analysis consists of the following four steps: First, cross-correlations are calculated for every pair of traces in each shot gather. Second, correlation traces having a common mid-point are gathered, and those traces that have equal spacing are stacked in the time domain. The resultant cross-correlation gathers resemble shot gathers and are referred to as CMP cross-correlation gathers. Third, a multi-channel analysis is applied to the CMP cross-correlation gathers for calculating phase velocities of surface waves. Finally, a 2D S-wave velocity profile is reconstructed through non-linear least squares inversion. Analyses of waveform data from numerical modelling and field observations indicate that the new method could greatly improve the accuracy and resolution of subsurface S-velocity structure, compared with conventional surface-wave methods.

ASSESSMENT of CORE BYPASS FLOW IN A PRISMATIC VERY HIGH TEMPERATURE REACTOR BY USING MULTI-BLOCK EXPERIMENT and CFD ANALYSIS (다중블록실험과 전산유체해석을 통한 블록형 초고온가스로의 노심우회유량 평가)

  • Yoon, S.J.;Lee, J.H.;Kim, M.H.;Park, G.C.
    • Journal of computational fluids engineering
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    • v.16 no.3
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    • pp.95-103
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    • 2011
  • In the block type VHTR core, there are inevitable gaps among core blocks for the installation and refueling of the fuel blocks. These gaps are called bypass gap and the bypass flow is defined as a coolant flows through the bypass gap. Distribution of core bypass flow varies according to the reactor operation since the graphite core blocks are deformed by the fast neutron irradiation and thermal expansion. Furthermore, the cross-flow through an interfacial gap between the stacked blocks causes flow mixing between the coolant holes and bypass gap, so that complicated flow distribution occurs in the core. Since the bypass flow affects core thermal margin and reactor efficiency, accurate prediction and evaluation of the core bypass flow are very important. In this regard, experimental and computational studies were carried out to evaluate the core bypass flow distribution. A multi-block experimental apparatus was constructed to measure flow and pressure distribution. Multi-block effect such as cross flow phenomenon was investigated in the experiment. The experimental data were used to validate a CFD model foranalysis of bypass flow characteristics in detail.

Stack-Structured Phase Change Memory Cell for Multi-State Storage (멀티비트 정보저장을 위한 적층 구조 상변화 메모리에 대한 연구)

  • Lee, Dong-Keun;Kim, Seung-Ju;Ryu, Sang-Ouk
    • Journal of the Semiconductor & Display Technology
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    • v.8 no.1
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    • pp.13-17
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    • 2009
  • In PRAM applications, the devices can be made for both binary and multi-state storage. The ability to attain intermediate stages comes either from the fact that some chalcogenide materials can exist in configurations that range from completely amorphous to completely crystalline or from designing device structure such a way that mimics multiple phase chase phenomena in single cell. We have designed stack-structured phase change memory cell which operates as multi-state storage. Amorphous $Ge_xTe_{100-x}$ chalcogenide materials were stacked and a diffusion barrier was chosen for each stack layers. The device is operated by crystallizing each chalcogenide material as sequential manner from the bottom layer to the top layer. The amplitude of current pulse and the duration of pulse width was fixed and number of pulses were controlled to change overall resistance of the phase change memory cell. To optimize operational performance the thickness of each chalcogenide was controlled based on simulation results.

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One-Touch Type Immunosenging Lab-on-a-chip for Portable Point-of-care System (휴대용 POC 시스템을 위한 원터치형 면역 센싱 랩온어칩)

  • Park, Sin-Wook;Kang, Tae-Ho;Lee, Jun-Hwang;Yoon, Hyun-C.;Yang, Sang-Sik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.8
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    • pp.1424-1429
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    • 2007
  • This paper presents a simple and reliable one-touch type multi-immunosensing lab-on-a-chip (LOC) detecting antibodies as multi-disease markers using electrochemical method suitable for a portable point-of-care system (POCS). The multi-stacked LOC consists of a PDMS space layer for liquids loading, a PDMS valve layer with 50 im in height for the membrane, a PDMS channel layer for the fluid paths, and a glass layer for multi electrodes. For the disposable immunoassay which needs sequential flow control of sample and buffer liquids according to the designed strategies, reliable and easy-controlled on-chip operation mechanisms without any electric power are necessary. The driving forces of sequential liquids transfer are the capillary attraction force and the pneumatic pressure generated by air bladder push. These passive fluid transport mechanisms are suitable for single-use LOC module. Prior to the application of detection of the antibody as a disease marker, the model experiments were performed with anti-DNP antibody and anti-biotin antibody as target analytes. The flow test results demonstrate that we can control the fluid flow easily by using the capillary stop valve and the PDMS check valves. By the model tests, we confirmed that the proposed LOC is easily applicable to the bioanalytic immunosensors using bioelectrocatalysis.

Multi-Level FeRAM Utilizing Stacked Ferroelectric Structure (강유전성 물질을 이용한 Multi-level FeRAM 구조 및 동작 분석)

  • Seok Heon Kong;June Hyeong Kim;Seul Ki Hong
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.3
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    • pp.73-77
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    • 2023
  • In this study, we developed a Multi-level FeRAM (Ferroelectrics random access memory) device utilizing different ferroelectric materials and analyzed its operation through C-V analysis using simulations. To achieve Multi-level operation, we proposed an MFM (Multi-Ferroelectric Material) structure by depositing two different ferroelectric materials with distinct properties horizontally on the same bottom electrode and subsequently adding a gate electrode on top. By analyzing C-V peaks based on the polarization phenomenon occurring under different voltage conditions for the two materials, we confirmed the feasibility of achieving Multi-level operation, where either one or both of the materials can be polarized. Furthermore, we validated the process for implementing the proposed structure using semiconductor fabrication through process simulations. These results signify the significance of the new structure as it allows storing multiple states in a single memory cell, thereby greatly enhancing memory integration.

Effects of multi-layered active layers on solution-processed InZnO TFTs

  • Choi, Won Seok;Jung, Byung Jun;Kwon, Myoung Seok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.204.1-204.1
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    • 2015
  • We studied the electrical properties and gate bias stress (GBS) stability of thin film transistors (TFTs) with multi-stacked InZnO layers. The InZnO TFTs were fabricated via solution process and the In:Zn molar ratio was 1:1. As the number of InZnO layers was increased, the mobility and the subthreshold swing (S.S) were improved, and the threshold voltage of TFT was reduced. The TFT with three-layered InZnO showed high mobility of $21.2cm^2/Vs$ and S.S of 0.54 V/decade compared the single-layered InZnO TFT with $4.6cm^2/Vs$ and 0.71 V/decade. The three-layered InZnO TFTs were relatively unstable under negative bias stress (NBS), but showed good stability under positive bias stress (PBS).

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Impact Properties of S-2 Glass Fiber Composites with Multi-axial Structure (다축 구조 S-2 유리섬유 복합재의 충격 특성)

  • Song, S.W.;Lee, C.H.;Byun, J.H.;Hwang, B.S.;Um, M.K.;Lee, S.K.
    • Proceedings of the Korean Society For Composite Materials Conference
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    • 2005.04a
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    • pp.71-75
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    • 2005
  • For the damage tolerance improvement of conventional laminated composites, stitching process have been utilized for providing through-thickness reinforcements. 2D preforms were stacked with S-2 glass plain weave and S-2 glass MWK (Multi-axial Warp Knit) L type. 3D preforms were fabricated using the stitching process. All composite samples were fabricated by RTM (Resin Transfer Molding) process. To examine the damage resistance performance the low speed drop weight impact test has been carried out. For the assessment of damage after the impact loading, specimens were examined by scanning image. CAI (Compressive After Impact) tests were also conducted to evaluate residual compressive strength. Compared with 2D composites, the damage area of 3D composites was reduced by 20-30% and the CAI strength showed 5-10% improvement.

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Development of Multi-axis Nano Positioning Stage for Optical Alignment (광소자 정렬용 극초정밀 다축 위치 제어장치 개발)

  • 정상화;이경형;차경래;김현욱;최석봉;김광호;박준호
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2004.10a
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    • pp.304-307
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    • 2004
  • As optical fiber communication grows, the fiber alignment become the focus of industrial attention. This greatly influence the overall production rates for the opto-electric products. We proposed multi-axis nano positioning stage for optical fiber alignment. This device has 3 DOF translation and sub nanometer resolution. This nano stage consist of 3 PZT-driven flexure stages which are stacked parallel. The displacement of it is measured with capacitance gauge and is controlled by computer-embedded main controller. The design process of flexure stage using FEM is proposed and the performance evaluation of this system is verified with experiments.

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Fatigue Life Analysis on Multi-Stacked Film Under Thermal and Residual Stresses (열응력과 잔류응력하의 다층박막의 피로수명 해석)

  • Park Jun-Hyub
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.29 no.4 s.235
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    • pp.526-533
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    • 2005
  • Reliability problem in inkjet printhead, one of MEMS devices, is also very important. To eject an ink drop, the temperature of heater must be high so that ink contacting with surface reaches above $280^{o}C$ on the instant. Its heater is embedded in the thin multi-layer in which several materials are deposited. MEMS processes are the main sources of residual stresses development. Residual stress is one of the factors reducing the reliability of MEMS devices. We measured residual stresses of single layers that consist of multilayer. FE analysis is performed using design of experiment(DOE). Transient analysis for heat transfer is performed to get a temperature distribution. And then static analysis is performed with the temperature distribution obtained by heat transfer analysis and the measured residual stresses to get a stress distribution in the structure. Although the residual stress is bigger than thermal stress, thermal stress is more influential on fatigue life.