• Title/Summary/Keyword: Multi-core scheduling

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Probabilistic Power-saving Scheduling of a Real-time Parallel Task on Discrete DVFS-enabled Multi-core Processors (이산적 DVFS 멀티코어 프로세서 상에서 실시간 병렬 작업을 위한 확률적 저전력 스케쥴링)

  • Lee, Wan Yeon
    • Journal of the Korea Society of Computer and Information
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    • v.18 no.2
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    • pp.31-39
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    • 2013
  • In this paper, we propose a power-efficient scheduling scheme that stochastically minimizes the power consumption of a real-time parallel task while meeting the deadline on multicore processors. The proposed scheme applies the parallel processing that executes a task on multiple cores concurrently, and activates a part of all available cores with unused cores powered off, in order to save power consumption. It is proved that the proposed scheme minimizes the mean power consumption of a real-time parallel task with probabilistic computation amount on DVFS-enabled multicore processors with a finite set of discrete clock frequencies. Evaluation shows that the proposed scheme saves up to 81% power consumption of the previous method.

Development of Embedded Web Server System Using a Real-Time OS (실시간 운영체제를 이용한 내장형 웹서버 시스템 개발)

  • 정명용;문승빈;송상훈
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.223-223
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    • 2000
  • Embedded system area has brought an innovation and has been spread rapidly by the growth of the Internet, wireless telephony and multimedia recently. Many embedded systems are required to be real-time systems in that it needs multi-tasking and priority based scheduling. This paper introduces a real-time system that was developed with web server ability for control and monitoring system employing a real-time operating system. It discusses the design model, structure, and applications of web server system. We used SNDS100 board which has a 32-bit RISC microcontroller of ARM7TDMI core as a hardware platform. MicroC/OS kernel was used as Real-time operating system that supports a preemptive and multitasking functions. We developed a hierarhchical control and monitoring system that not only reduced system and management costs, but also enhanced reusability and portability.

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A study of workload consolidation considering NUMA affinity (NUMA affinity를 고려한 Workload Consolidation 연구)

  • Seo, Dongyou;Kim, Shin-gye;Choi, Chanho;Eom, Hyeonsang;Yeom, Heon Y.
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.11a
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    • pp.204-206
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    • 2012
  • SMP(Symmetric Multi-Processing)는 Shared memory bus 를 사용함으로써 scalability 가 제한적이었다. 이런 SMP의 scalability 제한을 극복하기 위해 제안 된 것이 NUMA(Non Uniform Memory Access)이다. NUMA는 memory bus 를 CPU 별 local 하게 가지고 있어 자신이 가지는 memory 영역에 대해서는 다른 영역을 접근하는 것 보다 더 빠른 latency 를 가지는 구조이다. Local 한 memory 영역의 존재는 scalability를 높여 주었지만 서버 가상화 환경에서 VM을 동적으로 scheduling 을 하였을 때 VM의 page 가 실행되는 core 의 local 한 메모리 영역에 존재하지 않게 되면 remote access로 인해 local access보다 성능이 떨어진다. 이 논문에서는 서버 가상화 환경에서 최신 architecture인 AMD bulldozer에서 NUMA affinity가 위반되었을 때 발생하는 성능 저하와 어떤 상황에서 이런 NUMA affinity가 위반되어도 성능저하가 없는지 연구하였다.

Trends on Task Scheduling in Heterogeneous Multi-core Processors (이종 멀티코어 프로세서 작업 스케줄링에 관한 연구 동향 분석)

  • Kim, Sung-il;Kim, Jong-kook
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.04a
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    • pp.119-122
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    • 2012
  • 이종 멀티코어 프로세서는 각기 상이한 마이크로아키텍처, 캐시 사이즈, 클록 주파수를 갖는 다수의 코어 또는 프로세싱 유닛으로 이루어진 마이크로프로세서이다. 저에너지 소비가 산업계의 키워드로 부상하고 있는 이 시기에 이종 멀티코어는 동종 멀티코어보다 더 낮은 전력을 소비하고 성능면에서도 더 나은 프로세서로 주목받고 있다. 하지만, 동종 멀티코어에서의 동작을 가정하는 현재의 운영체제의 작업 스케줄러로는 이종 멀티코어의 이종적인 특성을 잘 활용할 수 없다. 본 논문에서는 이종 멀티코어 프로세서 작업 스케줄링에 관한 연구를 다면적으로 분석하여 각 방법의 장점과 단점을 개략적으로 정리하고 관련된 이슈들을 살펴보고자 한다.

Impact of Process Scheduling on Network Performance over Multi-Core Systems (멀티 코어 시스템에서 통신 프로세스의 스케줄링에 따른 성능 분석)

  • Jang, Hye-Churn;Jin, Hyun-Wook
    • Proceedings of the Korea Information Processing Society Conference
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    • 2009.04a
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    • pp.827-829
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    • 2009
  • 현재 멀티 코어 프로세서는 많은 서버에 적용되어 사용되고 있으며, 향후에는 하나의 프로세서 패키지에 포함될 코어의 개수는 계속해서 증가할 것이다. 그러나 현재 운영체제들은 멀티 코어 시스템을 멀티 프로세서 환경과 거의 동일하게 다루고 있으며 아직 멀티 코어 특성을 고려한 성능 최적화 시도는 미흡한 상태이다. 본 논문은 SMP와 NUMA 구조의 멀티 코어 프로세서 환경에서 통신 프로세스와 네트워크 인터럽트의 프로세서 친화도를 변화시키며 네트워크 처리율과 코어의 유휴 자원 양을 정량적으로 분석한다. 측정 결과 프로세서 친화도에 따라 통신 처리율은 크게 변하지 않지만 프로세서 자원의 요구량에는 크게 영향을 주는 것을 보인다. 또한 이러한 프로세서 자원의 영향은 멀티 코어 프로세서의 캐쉬 공유 구조 및 메모리 분산 구조와 밀접한 관계를 갖고 있음을 밝힌다.

Parallel Processing of Airborne Laser Scanning Data Using a Hybrid Model Based on MPI and OpenMP (MPI와 OpenMP기반 하이브리드 모델을 이용한 항공 레이저 스캐닝 자료의 병렬 처리)

  • Han, Soo-Hee;Park, Il-Suk;Heo, Joon
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.30 no.2
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    • pp.135-142
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    • 2012
  • In the present study, a parallel processing method running on a multi-core PC-Cluster is introduced to produce digital surface model (DSM) and digital terrain model (DTM) from huge airborne laser scanning data. A hybrid model using both message passing interface (MPI) and OpenMP was devised by revising a conventional MPI model which utilizes only MPI, and tested on a multi-core PC-Cluster for performance validation. In the results, the hybrid model has not shown better performances in the interpolation process to produce DSM, but the overall performance has turned out to be better by the help of reduced MPI calls. Additionally, scheduling function of OpenMP has revealed its ability to enhance the performance by controlling inequal overloads charged on cores induced by irregular distribution of airborne laser scanning data.

A Study on Parallel Performance Optimization Method for Acceleration of High Resolution SAR Image Processing (고해상도 SAR 영상처리 고속화를 위한 병렬 성능 최적화 기법 연구)

  • Lee, Kyu Beom;Kim, Gyu Bin;An, Sol Bo Reum;Cho, Jin Yeon;Lim, Byoung-Gyun;Kim, Dong-Hyun;Kim, Jeong Ho
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.46 no.6
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    • pp.503-512
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    • 2018
  • SAR(Synthetic Aperture Radar) is a technology to acquire images by processing signals obtained from radar, and there is an increasing demand for utilization of high-resolution SAR images. In this paper, for high-speed processing of high-resolution SAR image data, a study for SAR image processing algorithms to achieve optimal performance in multi-core based computer architecture is performed. The performance deterioration due to a large amount of input/output data for high resolution images is reduced by maximizing the memory utilization, and the parallelization ratio of the code is increased by using dynamic scheduling and nested parallelism of OpenMP. As a result, not only the total computation time is reduced, but also the upper bound of parallel performance is increased and the actual parallel performance on a multi-core system with 10 cores is improved by more than 8 times. The result of this study is expected to be used effectively in the development of high-resolution SAR image processing software for multi-core systems with large memory.

An Elective Multi-Project Management for the Small and Medium-sized Construction Companies - Focused on the Planning and Scheduling - (중소건설업체의 다중현장관리를 위한 공사관리업무의 효율화 방안 - 공정관리업무를 중심으로 -)

  • Choi Kwang-Hee;Han Ju-Yeon;Kim Kyung-Rai;Shin Dong-Woo
    • Proceedings of the Korean Institute Of Construction Engineering and Management
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    • autumn
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    • pp.504-510
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    • 2002
  • As the Scale of construction work is enlarged, complicated and diversified, construction information from the large number of construction sites is happened at site and reported to the head office. To simultaneously control the individual or large number of sites in large number of construction information, the necessity of making extract the important point of the information and the board of director's making a suitable decision to support the fields is increased. Also, as driving the construction industry to be informative, efficiently aggregating the information created in fields, efficiently making decision and controlling the construction work is increased the importance of the company's competitiveness factor. To simultaneously control multi-construction sites in the small and medium size construction firms define the fundamental and core information factor which needed in the head office and suggest the appling method.

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Adaptive User Selection in Downlink Multi-User MIMO Networks (다중 사용자 및 다중 안테나 하향링크 네트워크에서 적응적 사용자 선택 기법)

  • Ban, Tae-Won;Jung, Bang Chul
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.7
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    • pp.1597-1601
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    • 2013
  • Multiple antenna technique is attracting attention as a core technology for next-generation mobile communication systems to accommodate explosively increasing mobile data traffic. Especially, recent researches focus on multi-user multiple input multiple output (MU-MIMO) system where base stations are equipped with several tens of transmit antennas and transmit data to multiple terminals (users) simultaneously. To enhance the performance of MU-MIMO systems, we, in this paper, propose an adaptive user selection algorithm which adaptively selects a user set according to varying channel states. According to Monte-Carlo based computer simulations, the performance of proposed scheme is significantly improved compared to the conventional scheme without user selection and approaches that of exhaustive search-based optimal scheme. On the other hand, the proposed scheme can reduce the computational complexity to $K/(2^K-1)$ compared to the optimal scheme where K denotes the number of total users.

Parallel LDPC Decoder for CMMB on CPU and GPU Using OpenCL (OpenCL을 활용한 CPU와 GPU 에서의 CMMB LDPC 복호기 병렬화)

  • Park, Joo-Yul;Hong, Jung-Hyun;Chung, Ki-Seok
    • IEMEK Journal of Embedded Systems and Applications
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    • v.11 no.6
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    • pp.325-334
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    • 2016
  • Recently, Open Computing Language (OpenCL) has been proposed to provide a framework that supports heterogeneous computing platforms. By using an OpenCL framework, digital communication systems can support various protocols in a unified computing environment to achieve both high portability and high performance. This article introduces a parallel software decoder of Low Density Parity Check (LDPC) codes for China Multimedia Mobile Broadcasting (CMMB) on a heterogeneous platform. Each step of LDPC decoding has different parallelization characteristics. In this paper, steps suitable for task-level parallelization are executed on the CPU, and steps suitable for data-level parallelization are processed by the GPU. To improve the performance of the proposed OpenCL kernels for LDPC decoding operations, explicit thread scheduling, loop-unrolling, and effective data transfer techniques are applied. The proposed LDPC decoder achieves high performance by using heterogeneous multi-core processors on a unified computing framework.