• Title/Summary/Keyword: Multi-core Architecture

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Accelerated Large-Scale Simulation on DEVS based Hybrid System using Collaborative Computation on Multi-Cores and GPUs (멀티 코어와 GPU 결합 구조를 이용한 DEVS 기반 대규모 하이브리드 시스템 모델링 시뮬레이션의 가속화)

  • Kim, Seongseop;Cho, Jeonghun;Park, Daejin
    • Journal of the Korea Society for Simulation
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    • v.27 no.3
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    • pp.1-11
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    • 2018
  • Discrete event system specification (DEVS) has been used in many simulations including hybrid systems featuring both discrete and continuous behavior that require a lot of time to get results. Therefore, in this study, we proposed the acceleration of a DEVS-based hybrid system simulation using multi-cores and GPUs tightly coupled computing. We analyzed the proposed heterogeneous computing of the simulation in terms of the configuration of the target device, changing simulation parameters, and power consumption for efficient simulation. The result revealed that the proposed architecture offers an advantage for high-performance simulation in terms of execution time, although more power consumption is required. With these results, we discovered that our approach is applicable in hybrid system simulation, and we demonstrated the possibility of optimized hardware distribution in terms of power consumption versus execution time via experiments in the proposed architecture.

Implementation of MDCT core in Digital-Audio with Micro-program type vector processor

  • Ku Dae Sung;Choi Hyun Yong;Ra Kyung Tae;Hwang Jung Yeun;Kim Jong Bin
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.477-481
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    • 2004
  • High Quality CD, OAT audio requires that large amount of data. Currently, multi channel preference has been rapidly propagated among latest users. The MPEG(Moving Picture Expert Group) is provides data compression technology of sound and image system. The MPEG standard provides multi channel and 5.1 sounds, using the same audio algorithm as MPEG-l. And MPEG-2 audio is forward and backward compatible. The MDCT (Modified Discrete Cosine Transform) is a linear orthogonal lapped transform based on the idea of TDAC(Time Domain Aliasing Cancellation). In this paper, we proposed the micro-program type vector processor architecture a benefit in MDCT/IMDCT of MPEG-II AAC. And it's reduced operating coefficient by overlapped area to bind. To compare original algorithm with optimized algorithm that cosine coefficient reduced $0.5\%$multiply operating $0.098\%$ and add operating 80.58\%$. Algorithm test is used C-language then we designed hardware architecture of micro-programmed method that applied to optimized algorithm. This processor is 20MHz operation 5V.

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Synchronous Segmented Bus Architecture for Multitasking on Multimedia System (멀티미디어용 다중작업이 가능한 동기 세그먼트 구조)

  • Jun Chi-Hoon;Yeon Gyu-Sung;Hwang Tae-Jin;Wee Jae-Kyung
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2004.11a
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    • pp.299-302
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    • 2004
  • 본 논문은 OCP(Open Core Protocol)에 호환되는 파이프라인 구조를 가진 시스템 버스와 MPEG 시스템에 적합한 메모리 버스를 갖는 계층 구조를 가지는 새로운 동기 세그먼트 버스를 제안한다. 이 구조는 MPEG 시스템의 모바일 제품에 사용되는 영상 데이터 처리를 위한 메모리 인터페이스에 기반을 둔 버스 구조와 Multi-master와 Multi-slave를 사용하여 고성능의 다중 처리를 위한 양방향 다중 버스 구조(bi-direction multiple bus architecture)를 가진다. 효율적인 데이터 처리를 위하여 파이프라인 stage와 결합된 Master와 Slave의 주소번지가 latency를 결정하며, 시스템의 특성에 따라서 IP 코어를 배치하였다. 제안된 버스는 저 전력 구현을 위하여 세그먼트 버스 구조를 가지고, 멀티미디어 SoC 시스템의 성능 저하 없이 다중 작업이 가능한 구조를 갖는다. Wirability를 고려하여 양방향 구조를 채택하였고, Testablility를 위하여 단방향(uni-direction) 구조와 대체 가능하다. 또한, Local arbiter의 수정만으로 Master의 추가가 가능한 확장 구조를 가진다. Latency를 줄이기 위하여 직접 제어 방식과 단순한 구조의 Central arbiter로 구현되었다.

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Intergenerational Programs and Spaces for the Improvement of Intergenerational Interactions in Integrated Welfare Facilities in Gyeonggi Province, South Korea (세대교류 활성화를 위한 세대통합 프로그램 및 세대교류 공간에 관한 연구 - 경기도 복지관을 중심으로)

  • Park, Hae-Sun;Ahn, Taeyoon
    • Journal of The Korea Institute of Healthcare Architecture
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    • v.18 no.2
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    • pp.65-76
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    • 2012
  • South Korea's rapid ageing and the fast increase of nuclear families have led to the social isolation of the elderly and generational conflicts. In order to solve these social problems, this study explores the ways in which different generations can communicate and interact more actively. We surveyed 110 social workers who run generation-integrated programs at community centers in Gyeonggi province, and also examined the spatial design of the four age-integrated community centers and analysed its effect on the intergenerational exchange. We propose several suggestions for intergenerational exchange programs and effective space planning to facilitate intergenerational interactions in multi-generational community centers. To develop intergenerational interactions and keep their constant relationship, the users of community centers should be the core of generation-integrated programs which can facilitate the intergenerational exchange and interactions.

Classification of Metro Station Areas Using Multi-Source Big Data: Case Studies in Beijing

  • Shuo Chen;Xiangyu Li
    • International Journal of High-Rise Buildings
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    • v.12 no.1
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    • pp.63-74
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    • 2023
  • Large-capacity public transportation systems, represented by urban metro lines, are the key to alleviating the significant increase in urbanization and motorization in China. But to improve the agglomeration effect of metro stations in a more accurate and targeted way requires scientific evaluation and classification of the surrounding areas of metro stations. As spatial and functional design are the core factors for urban renewal design, this study took Beijing as an example, using multi-source data to evaluate the morphology and functional composition surrounding areas of metro stations, and the Boston Consulting Group (BCG) matrix was used to classify and characterize each type of surrounding areas from morphological-functional dimensions. It shows a negative correlation of the mix-use index with the floor area ratio, and only about 20% of the areas achieve the ideal situation of high construction intensity with high mix-use diversity. Hoping to provide a reference for city managers and designers in dealing with the surrounding metro stations with different construction intensities in a more precise way.

Integrated Data Environment (IDE): Concept & Implementation Technology (통합 데이타 환경: 개념 및 구현기술)

  • 김덕현
    • The Journal of Society for e-Business Studies
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    • v.1 no.1
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    • pp.69-92
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    • 1996
  • An Integrated Data Environment (IDE) is the end state of the CALS vision. It refers to an environment where all the data generated from the entire lifecycle activities of a product can be shared by anyone that participates in the management. engineering, manufacturing, or support of the product, although the data are geographically distributed and are maintained in heterogeneous platforms. The primary purpose of this paper is to introduce the fundamental concept, architecture, and core implementation technology of an IDE. The secondary purpose is to suggest some strategic directions to the planning staffs in both government and industry. and to suggest some research issues to the researchers in academia. The reference architecture of an IDE being developed by the US DoD and that of NIIIP (National Industrial Information Infrastructure Protocol) being developed by a consortium are discussed. Two principal issues of implementing an integrated database, i.e., distributed object computing including CORBA and multi-database system (MDBS) are reviewed. As a conclusion. the author suggests that daring investment in prototyping an IDE by a nationwide consortium is essential to keep up with the advanced countries in CALS implementation.

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AN EFFICIENT INCOMPRESSIBLE FREE SURFACE FLOW SIMULATION USING GPU (GPU를 이용한 효율적인 비압축성 자유표면유동 해석)

  • Hong, H.E.;Ahn, H.T.;Myung, H.J.
    • Journal of computational fluids engineering
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    • v.17 no.2
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    • pp.35-41
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    • 2012
  • This paper presents incompressible Navier-Stokes solution algorithm for 2D Free-surface flow problems on the Cartesian mesh, which was implemented to run on Graphics Processing Units(GPU). The INS solver utilizes the variable arrangement on the Cartesian mesh, Finite Volume discretization along Constrained Interpolation Profile-Conservative Semi-Lagrangian(CIP-CSL). Solution procedure of incompressible Navier-Stokes equations for free-surface flow takes considerable amount of computation time and memory space even in modern multi-core computing architecture based on Central Processing Units(CPUs). By the recent development of computer architecture technology, Graphics Processing Unit(GPU)'s scientific computing performance outperforms that of CPU's. This paper focus on the utilization of GPU's high performance computing capability, and presents an efficient solution algorithm for free surface flow simulation. The performance of the GPU implementations with double precision accuracy is compared to that of the CPU code using an representative free-surface flow problem, namely. dam-break problem.

Design Concept and Architecture Analysis of Cell Microprocessor (Cell 마이크로프로세서 설계 개념과 아키텍쳐 분석)

  • Moon Sang-Gook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.927-930
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    • 2006
  • While Intel has been increasing its exclusive possession in the system IC semiconductor market, IBM, Sony, and Toshiba founded an alliance to develop the next entertainment multi-core processor, which is named CELL. Cell is designed upon the Power architecture and includes 8 SPE (Synergistic processor Element) cores for data handling, and supports SIMD architecture for optimal execution of multimedia, or game applications. Also, it includes expanded Power microarchitecture. In this paper, we analyzed and researched the Cell microprocessor, which is evaluated as the most powerful processor in this era.

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Exploration of Optimal Multi-Core Processor Architecture for Physical Modeling of Plucked-String Instruments (현악기의 물리적 모델링을 위한 최적의 멀티코어 프로세서 아키텍처 탐색)

  • Kang, Myeong-Su;Choi, Ji-Won;Kim, Yong-Min;Kim, Jong-Myon
    • The Journal of the Acoustical Society of Korea
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    • v.30 no.5
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    • pp.281-294
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    • 2011
  • Physics-based sound synthesis usually requires high computational costs and this results in a restriction of its use in real-time applications. This motivates us to implement the sound synthesis algorithm of plucked-string instruments using multi-core processor architectures and determine the optimal processing element (PE) configuration for the target instruments. To determine the optimal PE configuration, we evaluate the impacts of a sample-per-processing element (SPE) ratio that is defined as the amount of sample data directly mapped to each PE on system performance and both area and energy efficiencies using architectural and workload simulations. For the acoustic guitar, the highest area and energy efficiencies are achieved at a SPE ratio of 5,513 and 2,756, respectively, for the synthesis of musical sounds sampled at 44.1 kHz. In the case of the classical guitar, the maximum area and energy efficiencies are achieved at a SPE ratio of 22,050 and 5,513, respectively. In addition, the synthetic sounds were very similar to original sounds in their spectra. Furthermore, we conducted MUSHRA subjective listening test with ten subjects including nine graduate students and one professor from the University of Ulsan, and the evaluation of the synthetic sounds was excellent.

A Design of Multi-Format Audio Decoder (복수 포멧 지원 오디오 복호화기 설계)

  • Park, Sung-Wook
    • Journal of the Korean Institute of Intelligent Systems
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    • v.17 no.4
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    • pp.477-482
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    • 2007
  • This paper presents an audio decoder architecture which can decode AC-3 and MPEG-2 audio bit-streams efficiently. MPEG-2 synthesis filtering is modified by the 32-point FFT to share the common data path with the AC-3's. A programmable Audio DSP core and a hardwired common synthesis tilter are incorporated for effective decoding of two different formats.