• 제어로봇시스템학회:학술대회논문집
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• 1992.10a
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• pp.537-540
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• 1992

This paper presents Samsung CNC (Computer Numerical Controller) system with an intel 80486/487 as the main CPU and a 32 bit floating point DSP(Digital Signal Processor) TMS320C30 as the motion control CPU. The Samsung CNC system diverse user-frienly characteristics such as multi-tasking, powerful menu system, internal PLC system, and 2/3 dimensional graphics in wire and solid mode. The main CPU executes central processing program, user interface program, interpreter, BMI, etc while the motion control CPU carries out some interpolations, acceleration/deceleration, and PID control algorithm with feedforward terms. Complex interpolations except linear and circular ones are performed on the main control CPU. The experimental results for the circular interpolation under linear acceleration/deceleration shows that the proposed CNC system can be widely used in controlling machining centers with good machining accuracy.

• The KIPS Transactions:PartC
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• v.12C no.3 s.99
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• pp.379-386
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• 2005

Traditional watermarking technologies are symmetric method which embedding and detection keys are same. Although the symmetric watermarking method is easy to detect the watermark, has method has weakness against to malicious attacks to remove or modify the watermark information when the symmetric key is disclosure. Recently, the asymmetric watermarking method that has different keys to embed and detect is watched several researchers as a next generation watermarking technology. In this paper, we have expanded search space of secret key using the solution set of linear simultaneous equations. Secret key is generated by secure linear transformation method to prevent of guessing secret key from public key, and the correlation value between secret key and public key is high. At the results, the multi bits information can be embedded and high correlation value was detected after JPEG compression.

• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.7 no.2
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• pp.331-339
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• 2017

This paper proposes a thread pool management technique of an websocket server that is applicable to embedded systems. WebSocket is a proposed technique for consisting a dynamic web, and is constructed using HTML5 and jQuery. Various studies have been progressing to construct a dynamic web by Apache, Oracle and etc. Previous web service systems require high-capacity, high-performance hardware specifications and are not suitable for embedded systems. The node.js which is consist of HTML5 and jQuery is a typical websocket server which is made by open sources, and is a java script based web application which is composed of a single thread. The node.js has a limitation on the performance for processing a high velocity data on the embedded system. We make up a multi-thread based websoket server which can solve the mentioned problem. The thread pool is managed by a bit register and suitable for embedded systems. To evaluate the performance of the proposed algorithm, we uses JMeter that is a network test tool.

• The KIPS Transactions:PartC
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• v.13C no.6 s.109
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• pp.749-756
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• 2006

Broadcast nature of wireless medium and path-loss reduction create a favourable condition for collaborative communications (CC) among single-antenna users to gain the powerful benefits of multi-antenna system without the demand for physical arrays. This paper proposes a CC strategy adapting to the propagation environment changes by optimizing the transmit signal amplification factors to simplify the structure of maximum likelihood (ML) detector and to obtain the minimum error probability as well. The closed-form BER expression was also derived and compared to the simulation results to evaluate the performance of the suggested solution. A variety of numerical results revealed the cooperation significantly outperforms non-cooperative counterpart under flat Rayleigh fading channel plus AWGN (Additive White Gaussian Noise).

• Proceedings of the KSRS Conference
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• 2004.10a
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• pp.436-439
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• 2004

Output data streams of the MSC contain flags, Headers and image data according to the established protocols and data formats. Especially the Header added to each data lines contain information of a line sync, a line counter and, ancillary data which consist of ancillary identification bit and one ancillary data byte. This information is used by ground station to calculate the geographic coordinates of the image and get the on-board time and several EOS(Electro-Optical Subsystem) parameters used at the time of imaging. Therefore, the EGSE(Electrical Ground Supporting Equipment) that is used for testing MSC has to have functions of interpreting and displaying this Header information correctly following the protocols. This paper describes the design of the header data processing module which is in EOS­EGSE. This module provides users with various test functions such as header validation, ancillary block validation, line-counter and In-line counter validation checks which allow convenient and fast test on imagery data.

• Proceedings of the KSRS Conference
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• v.2
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• pp.791-793
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• 2006

In the satellite camera, the incoming light source is converted to electronic analog signals by the electronic component for example CCD (Charge Coupled Device) detectors. The analog signals are amplified, biased and converted into digital signals (pixel data stream) in the video processor (A/Ds). The outputs of the A/Ds are digitally multiplexed and driven out using differential line drivers (two pairs of wires) for cross strap requirement. The MSC (Multi-Spectral Camera) in the KOMPSAT-2 which is a LEO spacecraft will be used to generate observation imagery data in two main channels. The MSC is to obtain data for high-resolution images by converting incoming light from the earth into digital stream of pixel data. The video data outputs are then MUXd, converted to 8 bit bytes, serialized and transmitted to the NUC (Non-Uniformity Correction) module by the Hotlink data transmitter. In this paper, the video data streams, the video data format, and the image data processing routine for satellite camera are described in terms of satellite camera control hardware. The advanced satellite with very high resolution requires faster and more complex image data chain than this algorithm. So, the effective change of the used image data chain and the fast video data transmission method are discussed in this paper

• Transactions of the Korean Society of Mechanical Engineers A
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• v.24 no.11
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• pp.2875-2882
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• 2000

Typically, the ultrasonic sensors can be used in navigation systems for modeling of the enviornment, obstacle avoidance, and map building. In this paper, we tried to approach an object classification method using the range data of the ultrasonic sensors. A characterization of the sonar scan is described that allows the differentiation of planes, corners, edges, cylindrical and rectangular pillars by processing the scanned data from three sonars. To use the data from the ultrasonic sensors as input to the neural networks, we have introduced a clustering, threshold, and bit operation algorithm for the obtained raw data, After repeated training of the neural network, the performance of the proposed method was obtained through experiments. Also, the recognition ranges of the proposed method were investigated. As a result of experiments, we found that the proposed method successfully recognized the objects within the accuracy of 78%.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.37 no.3
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• pp.37-44
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• 2000

In this paper, an efficient hardware architecture of Lempel-Ziv compressor for real time data compression is proposed. The accumulated shift operations in the Lempel-Ziv algorithm are the major problem, because many shift operations are needed to prepare a dictionary buffer and matching symbols. A new efficient architecture for the fast processing of Lempel-Ziv algorithm is presented in this paper. In this architecture, the optimization technique for dictionary size, a new comparing method of multi symbol and a rotational FIFO structure are used to control shift operations easily. For the functional verification, this architecture was modeled by C programming language, and its operation was verified by running on commercial DSP processor. Also, the design of overall architecture in VHDL was synthesized on commercial FPGA chip. The result of critical path analysis shows that this architecture runs well at the input bit rate of 256kbps with 33MHz clock frequency.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.4
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• pp.11-20
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• 1994

The error rate equation of DS-CDMA/DQPSK skgnal adopting ARQ scheme has been derived in indoor radio channel which is characterized by AWGN, multi-user interference (MUI) and Rician fading, Using the derived equation the error performance has been evaluated and shown in figures as a function of direct to diffuse signal power ratio(KS1rT), the number of active users (K), PN code sequence length (N), the number of parity bit of linear code (b), forward channel BER, and ES1bT/NS1OT. From the results it is known that in severe fading environments (KS1rT=6) the performance of DS-CDMA/DQPSK system is not reliable so it is needed to adopt techniques for improvement. When an ARQ scheme is adopted, as a method for improving error performance, the performance improves compared with that of non-ARQ scheme and the degree of improvement is proportional to the number of parity bits of linear code. As increasing the number of parity bits, system performance is improved vut system throughput efficiency must be considered. In severe fading channel Hybrid ARQ scheme is more effective than ARQ scheme. As a result, ARQ scheme is appropriate for the high-reliability data communication systems over the radio channel in which the real time processing is not required.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.7
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• pp.1659-1666
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• 1998

The multicode CDMA systems that are widely studied as an effective transmission methodology in the IMT-2000 systems, employ orthogonal codes to transform high rate data into parallel, low rate data for simultaneous transmission. In this paper, we propose a new multicode CDMA system which achieves the same data rate and processing gain of the conventional systems, while significantly improves bit error rate performance by exploiting a convolutional code with code rate r=1/2 and a bi-orthogonal code. The simulation results for synchronous systems using maximal ratio combining Rake receivers under additive white Gaussian noise and multi-path fading channels, show significant improviements by the proposed system.