• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.5
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• pp.335-342
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• 2022

In this paper, a single-bit 3rd-order feedforward delta sigma modulator is proposed for audio applications. The proposed modulator is based on a class-C inverter for low voltage and power applications. For the high-precision requirement, the class-C inverter with regulated cascode structure increases its DC gain and acts as a low-voltage subthreshold amplifier. The proposed Class-C inverter-based modulator is designed and simulated in 180-nm CMOS process. With no performance loss and a low supply voltage compatibility, the proposed class-C inverter-based switched-capacitor modulator achieves high power efficiency. This design achieves an signal-to-noise-and-distortion ratio (SNDR) of 93.9 dB, an signal-to-noise ratio (SNR) of 108 dB, an spurious-free dynamic range (SFDR) of 102 dB, and a dynamic range (DR) of 102 dB at a signal bandwidth of 20 kHz and a sampling frequency of 4 MHz, while only using 280 μW of power consumption from a 0.8-V power supply.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.97-99
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• 1998

A optical phase modulator of 5Gbps was fabricated on LiNbO$_3$ by Ti diffusion for optical communications. In this Paper the pigtailing, mode patterns and insertion loss were discussed. And the device Properties of driving voltage and bandwidth were measured.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.11a
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• pp.404-404
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• 2004

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.7
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• pp.39-46
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• 2016

This paper describes the third order feedforward delta-sigma modulator with inverter-based integrators and a 1.5bit comparator for the application of audio signal processing. The proposed 3rd-order delta-sigma modulator is multi-bit structure using 1.5 bit comparator instead of operational amplifier. This delta-sigma modulator has high SNR compared with single-bit 4th-order delta-sigma modulator in a low OSR. And it minimizes power consumes and simplified circuit structure using inverter-based integrator and using inverter-based integrator as analogue adder. The modulator was designed with 0.18um CMOS standard process and total chip area is $0.36mm^2$. The measured power cosumption is 28.8uW in a 0.8V analog supply and 66.6uW in a 1.8V digital supply. The measurement result shows that the peak SNDR of 80.7 dB, the ENOB of 13.1bit and the dynamic range of 86.1 dB with an input signal frequency of 2.5kHz, a sampling frequency of 2.56MHz and an oversampling rate of 64. The FOM (Walden) from the measurement result is 269 fJ/step, FOM (Schreier) was calculated as 169.3 dB.

• ETRI Journal
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• v.26 no.6
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• pp.589-596
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• 2004

Packaging technologies for a broadband and narrowband modulator with a traveling wave electro-absorption modulator (TWEAM) device were developed. In developing a broadband modulator, the effects of the device and packaging designs on the broadband performance were investigated. The optimized designs were obtained through a simulation with the result that we developed a broadband modulator with a 3 dB bandwidth of 38 GHz in the electrical-to-optical (E/O) response, an electrical return loss of less than -10 dB at up to 26 GHz, an rms jitter of 1.832 ps, and an extinction ratio of 5.38 dB in a 40 Gbps non-return to zero (NRZ) eye diagram. For analog application, the effect of the RF termination scheme on the fractional bandwidth was studied. The microstrip line with a double stub as a matching circuit and a laser trimming process were used to obtain an $S_{11}$ of -34.58 dB at 40 GHz and 2.9 GHz bandwidth of less than -15 dB.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.1778-1780
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• 2004

Microwave heating system of KSTAR consists of ECH and LHCD. ECH and LHCD offer the reliability of operation in the beginning of plasma formation and non-inductive current drive for long time steady state operation with maintaining MHD stability, respectively. LHCD demands 5 GHz of frequency and consists of c-band waveguide, 4-port circuitor, dry dummy load, dual directional coupler, E-bend, arc detector. Our system is a lineup type pulse modulator that has 45 kV of output pulse voltage, 90 A of pulse current, 4 us of pulse width. 1:4 step-up pulse transformer, 7 stages of PFN and thyratron tube (E2V, CX1191D) are used in this modulator. The purpose of this paper is to show the modulator design and experimental result.

• Journal of IKEEE
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• v.13 no.4
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• pp.103-109
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• 2009

We report an efficient jitter reduction technique in an analog fier-optic link employing a Mach-Zehnder modulator followed by an erbium-doped fiber amplifier. By adjusting the modulator-bias to $0.089V_{\pi}$, we could increase the RF gain up to 10.65 dB for 10 GHz RF signal and reduce the random jitter by 46.5%, max, at an input optical power of -0.11 dBm to the EDFA.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.4
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• pp.331-341
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• 2002

It is expected that the SCM (Subcarrier Multiplexing) optical link system, in which a number of small scale base stations with only antenna and RF transceiver are connected to central station through optical fiber, is in demand. In order to analyze the performance of SCM optical link system fur RF signal transmission, MZ(Mach-Zehnder) modulator's transfer function is modelled as nonlinear form with the cube of input signal. And considering the multiple access interferences occurred In the demodulation of other users'CDMA signals with multipath components after passing through MZ modulator, the BER performance is analyzed.

• The Journal of the Acoustical Society of Korea
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• v.6 no.3
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• pp.43-51
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• 1987

In this work an implementation of SAW based serial type AWQPSK modulator is studied. The SAW AWQPSK modulator consisting of input apodized IDT and output uniform IDT with center frequency of 20 MHz and bit rate of 4MHz has been designed and fabricated on $YZ-LiNbO_3$ substrate. Measured center frequency and null-to-null bandwidth are 20MHz, respectively. The sidelobe suppression is achieved 60dB below the peak mainlobe level. Measured responses meet the theoretical values with tolerable amount of deviation. SAW-based modulator simplifies the implementation of AWQPSK which uses complex pulse shape as a baseband pulse.

• The Journal of the Acoustical Society of Korea
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• v.18 no.5
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• pp.52-57
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• 1999

It is very important to design of QAM modulator of high spectral efficiency for high speed data transmission. In this paper, typical 16-QAM modulator is designed by modification design of DDFS(direct digital frequency synthesizer). DDFS generates sinusoidal waveform digitally to the frequency setting word. Phase modulation is accuratly made by control of a generated phase increment value and amplitude modulation is accomplished in the D/A converter output by control of amplitude level. For the suppression of harmonics and glitch, dual-structured DDFS is studied to improve the spurious characteristics. P-Spice is used for design and simulation in mixed mode. Also we can get the satisfactory results of designed 16-QAM modulator from the constellation output.