• Journal of the Korean Institute of Intelligent Systems
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• v.14 no.5
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• pp.583-586
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• 2004

Transition jitter noise is one of major sources of detection errors in high density recording channels. Implementation complexity of the optimal detector for such channels is high due to the data dependency and correlated nature of the jitter noise. In this paper, two types of hardware efficient sub-optimal detectors are derived by modifying branch metric of Viterbi algorithm and applied to partial response (PR) channels combined with run length limited modulation coding. The additional complexity over the conventional Viterbi algorithm to incorporate the modified branch metric is either a multiplication or an addition for each branch metric in the Viterbi trellis.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.9-12
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• 2001

In this paper, the natural space-time coding is applied for a DS-CDMA system with multiple transmit/receive antennas in a Rayleigh fading channel. With difference of arrival times from transmit antennas a modified maximum likelihood (ML) decoding algorithm is proposed for the space-time coded DS-CDMA system. The proposed decoding algorithm performs ML decoding over the transition of two consecutive branches by using a modified branch metric with the partial autocorrelation. By simulation, it is shown that the proposed decoding algorithm achieves significant performance improvement over the ML decoding algorithm without the modified branch metric.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.249-252
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• 2001

TCM(Trellis Coded Modulation) has soft decision scheme so that BM(Branch Metric) calculates the ED(Euclidean Distance) between the received signal and each code words in signal space. For computing the ED, square and square root computations increase the hardware complexity. Some simplified method is known for convolutional codes with QPSK(Quadrature Phase Shift Keying), PSK(Phase Shift Keying) modulation. But it is not acceptable for QAM (Quadrature Amplitude Modulation)-TCM scheme. In this paper, we suggest that two modified BM computation methods, which is applicable for QAM-TCM. By comparative study, we also assessed two proposed method in the case of hardware complexity and BER (Bit Error Rate) performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.10B
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• pp.1732-1743
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• 2000

In this paper a fixed-delay trellis search with decision feedback (FDTrS/DF) for high-density DVD systems (4.7-15GB) is proposed and implemented with FPGA. The proposed FDTrS/DF is derived by transforming the binary tree search structure into trellis search structure implying that FDTrS/DF performs better than the singnal detection techniques based on tree search structure such as FDTS/DF and SSD/DF. Advantages of FDTrS/DF are significant reductions in hardware complexity due to the unique structure of FDTrS composed of only one trellis stage requiring no traceback procedure usually implemented in the Viterbi detector. Also in this paper the PDFS/DF and SSD/DF orginally proposed for high-density magnetic recording systems are modified for the DVD system and compared with the proposed FDTrS/DF. In order to increase speed in the FPGA implementation the pipelining technique and absolute branch metric (instead of square branch metric) are applied. The proposed FDTrS/DF is shown to provide the best performance among various signal detection techniques such as PRML, DFE, FDTS/DF and SSD/DF even with a small hardware complexity.

• Journal of IKEEE
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• v.24 no.3
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• pp.838-844
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• 2020

In this paper, we propose an efficient Viterbi processor using Joint Viterbi detection and decoding (JVDD) algorithm for a for bluetooth low energy (BLE) system. Since the convolutional coded Gaussian minimum-shift keying (GMSK) signal is specified in the BLE 5.0 standard, two Viterbi processors are needed for detection and decoding. However, the proposed JVDD scheme uses only one Viterbi processor by modifying the branch metric with inter-symbol interference information from GMSK modulation; therefore, the hardware complexity can be significantly reduced without performance degradation. Low-latency and low-complexity hardware architecture for the proposed JVDD algorithm was proposed, which makes Viterbi decoding completed within one clock cycle. Viterbi Processor RTL synthesis results on a GF55nm process show that the gate count is 12K and the memory unit and the initial latency is reduced by 33% compared to the modified state exchange (MSE).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.7
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• pp.1734-1745
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• 1996

In this paper, a modified fixed-delay tree search with decision feedback(FDTS/DF) for compensation of non-linear distortion in digital magnetic recording channels is discussed. Since the nonlinear distortion, which becomes significant as recording density increases, is generally well modeled by the discrete Volterra series, the proposed equlizer is composed of a nolinear feedforward filter, a linear feedback filter, and a nonlinear distorton table, the values of which are determined by considering the effect of nonlinear distortion due to future data as well as the previous and current one. At the decision stage of FDTS, a path minimizing the branch metric is chosen by using the previously detected values, current predicted value, and future predicted value. We compare the performance of the linear FDTS/DF, the previous nonlinear FDTS/DF, and the proposed nonlinear FDTS/DF by computer simulation, and confirm that the proposed one chieves the best performance at high-density recording.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.7C
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• pp.642-646
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• 2005

We propose an improved partial response maximum likelihood (PRML) detector with the branch value compensation of Viterbi decoder for asymmetric high-density optical channel. Since the compensation value calculated by a survival path is applied to each branch metric, it reduces the detection errors by the asymmetric channel. The proposed PRML detection scheme improves the detection performance on the $2^{nd},\;3^{rd}\;and\;4^{th}$ order PR targets for asymmetric optical recording channel.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.6C
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• pp.601-609
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• 2002

The efficient Viterbi decoder that supports full data-rate output of DAB system was proposed. Viterbi decoder consumes lots of computational load and should be designed to be fast specific hardware. In this paper, SST scheme was adopted for Viterbi decoder with puncturing to reduced the power consumption. Puncturing vector tables are modified and re-arranged to be designed by a hardwired logic to save the system area. New re-scaling scheme which uses the fact that the difference of the maximum and minimum of the path metric values is bounded is proposed. The proposed re-scaling scheme optimizes the wordlength of path metric memory and greatly reduces the computational load for re-scaling by controlling MSB of path metric memory. Another saving of computation is done by proposed algorithm for branch metric calculation, which makes use of pre-calculated metric values. The designed Viterbi decoder was synthesized using SAMSUNG 0.35$\mu$ standard cell library and occupied small area and showed lower power consumption.

• Journal of Broadcast Engineering
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• v.8 no.4
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• pp.481-491
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• 2003

We present a near-optimal blind decision feedback equalizer (DFE) for Advanced Television Systems Committee digital television (DTV) receivers. By adopting a modified trellis decoder (MTD) with trace back depth of 1 for the decision device In the DFE, we obtain a hardware-efficient near-optimal blind DFE approaching to the optimal DFE which has no error propagation. The MTD uses absolute distance instead of Euclidean distance for computation of a path metric, resulting. In reduced computational complexity. Comparing to the conventional slicer, the MTD shows outstanding performance improvement of decision error probability and is comparable to the original trellis decoder using Euclidean distance. Reducing error propagation in the DFE leads to the improvement of convergence performance in terms of convergence speed and residual error. Simulation results show that the proposed blind DFE performs much better than the blind DFE with the slicer.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.9 no.6
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• pp.746-760
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• 1998

In this paper, an adaptive RSSD(reduced-state sequence detection) receiver is proposed for the purpose of reducing the complexity and decision delay of the adaptive MLSD(maximum-likelihood sequence detection) receiver in the mobile satellite channel. The RSSD receiver reconstructs the trellis with a reduced number of states. The performance degradation due to the reduced states is compensated by modifying the branch metric calculation which uses the symbols in each path memory to estimate the residual ISI(intersymbol interference) terms. The structure of the proposed adaptive RSSD is a modified RSSD utilizing a per-survivor processing as well as the symbol-aided method and a channel estimation using the tentative data sequences. The complexity and performance of the proposed adaptive RSSD are controlled by the number of system states and ISI cancelers and the inserting period of the known symbols. In spite of a suboptimal alternative receiver compared to the adaptive MLSD receiver, the proposed adaptive RSSD receiver is able to reduce the complexity significantly and track the time-varying channel fast and reliably.