• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.193-196
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• 2001

In this paper we designed CAMC-SP, the microprocessor embedded 2-axis motor control chip which controls a precise pulse motor by generating the pulse needed to control step motor, DC servo and AC servo motor. This design enables to decrease costs and to minimize a size. First we designed risc type 8-bit microprocessor compatible with PIC16C84, second we designed pulse motor controller. CAMC-SP is integrated of those two block. We designed CAMC-SP by VHDL and we testified to the Performance of it by performing functional simulation.

• Proceedings of the Korea Contents Association Conference
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• 2010.05a
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• pp.272-273
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• 2010

The method of interrupt control is attempted to recognize the button-pushed result from a keyboard scan through control of 30ms appropriate period instead of key scan control method for a microprocessor system. This experimental study shows the reduced processing load of a microprocessor and prevention of the error by an algorithm when the keyboard buttons are both pushed at the same time as we recognize the result of a keyboard scanning by an interrupt method. In addition, an algorithm is provided to recognize the result of scanning by C programming as the keyboard button of a microprocessor system is pushed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.4
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• pp.194-198
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• 2003

A 16-bit adiabatic low-power Micro-processor core is designed. The processor consists of control block, multi-port register file and ALU. A simplified four-phase clock generator is designed to provide supply clocks for adiabatic processor. All the clock line charge on the capacitive interconnections is recovered to recycle the energy. Adiabatic circuits are designed based on ECRL(efficient charge recovery logic) and $0.35\mu\textrm$ CMOS technology is used. Simulation results show that the power consumption of the adiabatic Microprocessor core is reduced by a factor of 2.9~3.1 compared to that of conventional CMOS Microprocessor

• Journal of the Korean Institute of Telematics and Electronics
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• v.18 no.3
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• pp.35-41
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• 1981

In this paper, the application of model reference adaptive control theory to the D.C motor speed control using the microprocessor is studied. It is shown that with the use of an adaptive control algorithm the error between output of the motor and the reference model, which is approximated to first order, can be conve to zero. By computer simulation and the practical implementation with the microprocessor M 6800, can be concluded that the adaptive control system adapts well to the rapid change of the load and reference inputs.

• Proceedings of the KIEE Conference
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• 1990.07a
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• pp.413-417
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• 1990

Various sampling methods are used for microprocessor-based measurement and analysis to nonsinusoidal waveforms caused by power electronic converters. The hamonic component generates the indicating errors at the measuring instruments. This can be solved by microprocessor-based measurement and hence the microprocessor-based measuring equipment and its algorithm are developed in this paper. As a result the suggested equipment has very good measuring performances.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.2
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• pp.409-416
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• 1996

This paper describes the simulation environment that verifies whether a new microporcessor described with HDL is compatible with an existing microprocessor. The compatibility verification is done by showing that the new microprocessor executes the OS(Operating System) program used in the existing microprocessor without any modification of its binary code. The proposed verification environment consists of a virtual system and a graphic user interface (GUI) module. Each module is independently designed based on serve-client model and three exists a communication part for information interchange between the two modules. This paper describes the method of constructing the verification environment and presents the compatibility verification environment of the x86 microprocessor as the simulation result.

• Journal of electromagnetic engineering and science
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• v.2 no.2
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• pp.68-74
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• 2002

In this paper, a pre-layout design approach for high-speed microprocessor is proposed. For multilayer PCB stark up configuration as well as selection and placement of decoupling capacitors, an effective solution for reducing SSN and EMI is obtained by modeling and simulation of complete power distribution system. The system model includes VRM, decoupling capacitors, multiple power and ground planes for core voltage, vias, as well as microprocessor. Finally, the simulation results are verified by measurements data.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.7
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• pp.115-122
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• 1995

This paper presents the simulation environment that verifies whether a new microprocessor described with HDL is compatible with MS-DOS. The phrase 'compatible with MS-DOS' means that the microprocessor can execute MS-DOS without any modification of MS-DOS's binary code. The proposed verification environment consists of HDL simulator and user interface module. And the communications between them are performed by using sockets which UNIXprovide. The HDL simulator is equipped with several functions, which use PLI to emulate ROM-BIOS facilities. The ROM-BIOS emulation routine is described by using these functions. User interface module utilizes S/MOTIF and participates in emulating PC monitor and keyboard. The verification environment is tested by executing the MS-DOS commands (DIR, FORMAT, DATE, TIME etc.) with the HDL model of microprocessor, and the display of user interface module verifies that the environment works correctly. In this paper, the method of constructing the verification environment is presented, and the simulation results are summarized.

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2106-2108
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• 2003

단상 또는 3상의 AC 전원의 전류나 전압 또는 전력을 계측하기 위해 Analog Signal들을 Digital Signal로 변환하여 특정 Algorithm의 연산을 수행하여 결과를 얻는 과정을 Microprocessor를 이용하여 처리하는 방법은 산업현장이나 연구개발에서 흔히 사용하는 방법이다. 본 논문에서는 Microprocessor를 이용하여 보편화된 3가지의 계측 Algorithm인 DFT, True RMS, Summation Algorithm을 사용하여 동일 System에 3상 AC의 전류 부하를 일정 범위에서 가변 하여 인가시키면서 계측 값을 사용하여 Algorithm의 계측 결과의 오차율과 연산에 소요되는 시간과 외부 잡음인 Surge, Impulse, 정전기, 방파, 고조파에 대한 System의 처리 효율을 연구 하였다.

• The Journal of Information Technology
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• v.9 no.1
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• pp.33-39
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• 2006

This study is for the contents of development to the hardware system and software driving algorithm to implement the frequency band of about 7KHz los pass digital filter which has the cut-off frequency of 392Hz by interfacing of a microprocessor with its peripheral analog-to-digital converter chip and digital-to-analog converter chip. The simplicity of digital filter design without difficulty and the implementation of programmed digital filter can be realized by providing the interfacing method to implement the law pass digital filter for the biological signals and the realization method of computer algorithm by a microprocessor.