• 한국전산유체공학회:학술대회논문집
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• 2011.05a
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• pp.117-123
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• 2011

The low electric power and high efficiency chips are required because of the appearance of smart phones. Also, high-capacity memory chips are needed. e-MMC(embedded Multi-Media Card) for this is defined by JEDEC(Joint Electron Device Engineering Council). The e-MMC memory for research and development is a memory mulit-chip module of 64GB using 16-multilayers of 4GB NAND-flash memory. And it has simplified the chip by using SIP technique. But mulit-chip module generates high heat by higher integration. According to the result of study, whenever semiconductor chip is about 10 $^{\circ}C$ higher than the design temperature it makes the life of the chip shorten more than 50%. Therefore, it is required that we solve the problem of heating value and make the efficiency of e-MMC improved. In this study, geometry of 16-multilayered structure is compared the temperature distribution of four different geometries along the numerical analysis. As a result, it is con finned that a multilayer structure of stair type is more efficient than a multilayer structure of vertical type because a multi-layer structure of stair type is about 9 $^{\circ}C$ lower than a multilayer structure of vertical type.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.9
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• pp.457-464
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• 2005

In this paper a 3D memory system that allows 17 access types at an arbitrary position is introduced. The proposed memory system is based on two main functions: memory module assignment function and address assignment function. Based on them, the memory system supports 17 access types: 13 Lines, 3 Rectangles, and 1 Hexahedron. That is, the memory system allows simultaneous access to multiple data in any access types at an arbitrary position with a constant interval. In order to allow 17 access types the memory system consists of memory module selection circuitry, data routing circuitry for READ/WRITE, and address calculation/routing circuitry In the point of view of a developer and a programmer, the memory system proposed in this paper supports easy hardware extension according to the applications and both of them to deal with it as a logical three-dimensional away In addition, multiple data in various across types can be simultaneously accessed with a constant interval. Therefore, the memory system is suitable for building systems related to ,3D applications (e.g. volume rendering and volume clipping) and a frame buffer for multi-resolution.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.12
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• pp.716-725
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• 2004

It is extremely important to minimize network access time in constructing a high-performance PC cluster system. For PC cluster systems, it is possible to reduce network access time by maintaining network cache in each cluster node. This paper presents a Network Cache Coherent NUMA (NCC-NUMA) system to utilize network cache by locating shared memory on the PCI bus, and the NCC-NUMA card which is core module of the NCC-NUMA system is developed. The NCC-NUMA card is directly plugged into the PCI slot of each node, and contains shared memory, network cache, shared memory control module and network control module. The network cache is maintained for the shared memory on the PCI bus of cluster nodes. The coherency mechanism between the network cache and the shared memory is based on the IEEE SCI standard. According to the SPLASH-2 benchmark experiments, the NCC-NUMA system showed improvements of 56% compared with an SCI-based cluster without network cache.

• Journal of Advanced Navigation Technology
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• v.15 no.6
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• pp.1104-1110
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• 2011

The conventional semiconductor equipment has adopted SRAM module as the test pattern memory, which has a simple design and does not require refreshing. However, SRAM has its disadvantages as it takes up more space as its capacity becomes larger, making it difficult to meet the requirements of large memories and compact size. if DRAM is adopted as the semiconductor inspection equipment, it takes up less space and costs less than SRAM. However, DRAM is also disadvantageous because it requires the memory cell refresh, which is not suitable for the semiconductor examination equipments that require correct timing. Therefore, In this paper, we will proposed an algorithm for punctuality guarantee of memory-free inspection equipment using DDR2 SDRAM. And we will Developed memory controller using punctuality guarantee algorithm. As the results, show that when we adopt the DDR2 SDRAM, we can get the benefits of saving 13.5 times and 5.3 times in cost and space, respectively, compared to the SRAM.

• Journal of the Korea Convergence Society
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• v.11 no.10
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• pp.1-7
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• 2020

The manufacturing process of the resistive variable memory device, which is the based of neuromorphic device, maintained the continuity of vacuum process and applied plasma module suitable for the production of the ReRAM(resistive random access memory) and process technology for the neuromorphic computing, which ensures high integrated and high reliability. The ReRAM device of the oxide thin-film applied to the plasma module was fabricated, and research to improve the properties of the device was conducted through various experiments through changes in materials and process methods. ReRAM device based on TiO₂/TiOx of oxide thin-film using plasma module was completed. Crystallinity measured by XRD rutile, HRS:LRS current value is 2.99 × 10³ ratio or higher, driving voltage was measured using a semiconductor parameter, and it was confirmed that it can be driven at low voltage of 0.3 V or less. It was possible to fabricate a neuromorphic ReRAM device using oxygen gas in a previously developed plasma module, and TiOx thin-films were deposited to confirm performance.

• The Journal of Information Technology
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• v.10 no.3
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• pp.47-58
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• 2007

In this paper, we designed and manufactured the distortion-cancellation module which is able to compensate thermal-noise distortion by software. The distortion-cancellation algorithm not only bring forth system non-linear distortion by input level but also bring compensate component of distortion by thermal to get rid off distortion from now on. After TMS 320C6711 DSP to recognize our algorithm, we manufactured the module for every kinds of system. To evaluate efficiency of the distortion-cancellation module, we designed and manufactured communication system. By measured result, if system output power is -3dBm equally, 12dB of ACLR has improved in 1MHz away from a center frequency, and also gain has increased up to 0.5dB.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.33 no.2
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• pp.337-344
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• 2023

Modern OSs, including Linux, show high scalability by adopting a monolithic kernel design, but have weak security because they share all memory space. This study presents a kernel module that are isolated inside the kernel using WebAssembly. WebAssembly provides a high-performance virtual machine by defining a low-level instruction set while guaranteeing memory safety. In this paper, the WebAssembly execution environment is implemented inside the kernel, allowing developers to control the operation of kernel modules and achieving higher security.

• Journal of Institute of Control, Robotics and Systems
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• v.18 no.2
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• pp.69-75
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• 2012

This paper proposes a biomimetic finger module to be used in a lightweight hand prosthesis. The finger module consists of finger skeleton and an actuator module driven by SMA (Shape Memory Alloy). The prototype finger module can perform flexion and extension motions; finger flexion is driven by a contraction force of SMA, but it is extended by an elastic force of an extension spring inserted into the finger skeleton. The finger motions are controlled by feedback of electric resistance of SMA because the finger module has no sensors to measure length and angle. Total weight of a prototype finger module is 30g. In experiments the finger motions and finger grip force are tested and compared with simulation results when a constant contraction force of SMA is given. The experimental results show that the proposed SMA-driven finger module is feasible to the lightweight hand prosthesis.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12C
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• pp.181-189
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• 2001

In this thesis, a policing algorithm is proposed, which is one of the traffic management function in ATM networks. The proposed algorithm minimizes CLR(Cell Loss patio) of high priority cells and solves burstiness problem of the traffic caused by multiplexing and demultiplexing process. The proposed algorithm has been implemented with VHDL and is divided into three parts, which are an input module, an UPC module, and an output module. In implementation of the UPC module\`s memory access, memory address is assigned according to VCI\`s LSB(Lowest Significant Byte) of ATM header for convenience. And the error of VSA operation from counter\`s wrap-around can be recovered by the proposed method. ANAM library 0.25 $\mu\textrm{m}$ and design compiler of Synopsys are used for synthesis of the algorithm and Synopsys VSS tool is used for VHDL simulation of it

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.1
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• pp.108-114
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• 2004

In this paper we propose the boot system using CF memory card and study the system implementation method. The system that is proposed in this paper basically consist of high performance microprocessor, small amount of program memory and CF memory card. And added LCD module and touch panel for the user interface. This system use the CF memory card and DRAM instead of the Flash memory, so it can reduce the system cost. And system performance is increased because of the system program running in the DRAM.