• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.436-437
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• 2012

Double patterning technology (DPT) has been suggested as a promising candidates of the next generation lithography technology in FLASH and DRAM manufacturing in sub-40nm technology node. DPT enables to overcome the physical limitation of optical lithography, and it is expected to be continued as long as e-beam lithography takes place in manufacturing. Several different processes for DPT are currently available in practice, and they are litho-litho-etch (LLE), litho-etch-litho-etch (LELE), litho-freeze-litho-etch (LFLE), and self-aligned double patterning (SADP) [1]. The self-aligned approach is regarded as more suitable for mass production, but it requires precise control of sidewall space etch profile for the exact definition of hard mask layer. In this paper, we propose etch end point detection (EPD) in spacer etching to precisely control sidewall profile in SADP. Conventional etch EPD notify the end point after or on-set of a layer being etched is removed, but the EPD in spacer etch should land-off exactly after surface removal while the spacer is still remained. Precise control of real-time in-situ EPD may help to control the size of spacer to realize desired pattern geometry. To demonstrate the capability of spacer-etch EPD, we fabricated metal line structure on silicon dioxide layer and spacer deposition layer with silicon nitride. While blanket etch of the spacer layer takes place in inductively coupled plasma-reactive ion etching (ICP-RIE), in-situ monitoring of plasma chemistry is performed using optical emission spectroscopy (OES), and the acquired data is stored in a local computer. Through offline analysis of the acquired OES data with respect to etch gas and by-product chemistry, a representative EPD time traces signal is derived. We found that the SE-EPD is useful for precise control of spacer etching in DPT, and we are continuously developing real-time SE-EPD methodology employing cumulative sum (CUSUM) control chart [2].

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2007년도 춘계학술발표회 초록집
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• pp.71-72
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• 2007

In this study, we investigated the fabrication of MLR (multi-layer resist) with a very thin diamond-like carbon (DLC) layer. ArF PR/$SiO_2$/DLC MLR structure was investigated and etching characteristics of the DLC layer was patterned using $SiO_2$ hard-mask by varying the process parameters such as different high-frequency/low-frequency combination ($f_{LF}/f_{HF}$), HF/LF power ratio ($P_{HF}/P_{LF}$), $O_2$ flow and $N_2$ flow rate in $O_2/N_2$/Ar plasmas. The results indicated an increased etch rate of DLC for the higher $f_{LF}/f_{HF}$ combination and for the increased low-frequency power ($P_{LF}$). And the etch rate of DLC was decreased with increasing the $N_2$ flow rate in $O_2/N_2$/Ar plasmas. In order to confirm the application of DLC MLR for the etching process of silicon oxide, the stack of ArF PR/BARC/$SiO_2$/DLC/TEOS/Si was investigated.

• 마이크로전자및패키징학회지
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• 제17권2호
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• pp.41-47
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• 2010

PCB와 BGA 패드의 형태가 무연솔더 접합부의 기계적 특성에 미치는 영향을 연구하었다. 현재 BGA/PCB 패드의 형태는 NSMD (Non-Solder Mask Defined)와 SMD (Solder Mask Defined) 두 가지 구조로 형성되어 있다. 본 연구에서는 OSP 도금처리한 무연솔더(Sn-3.0Ag-0.5Cu, Sn-1.2Ag-0.5Cu)의 패드 형태를 NSMD, SMD로 달리하여 낙하충격시험, 굽힘충격시험, 고속전단시험을 통한 솔더 접합부의 기계적 특성을 연구하였다. 낙하충격과 굽힘충격시험의 경우 패드 구조에 따른 솔더볼 접합부의 특성수명은 동일한 경향을 나타내었으며, 솔더접합부의 기계적 특성은 SMD가 NSMD보다 우수하였다. 이 이유는 SMD의 경우 낙하충격 시험과 고속 전단시험 모두 IMC에서 파단이 일어난 반면에 NSMD의 경우 낙하충격 시험 후의 파단면은 패턴을 감싸고 있는 랜드 상단 모서리 부분에서 파단이 일어났기 때문인 것으로 판단된다. 전단시험의 경우에는 NSMD 접합부에서 패드 lift현상이 발생하였다. 따라서 BGA/PCB의 패드구조의 조합은 SMD/SMD > SMD/NSMD > NSMD/SMD > NSMD/NSMD 순으로 기계적 특성 수명이 우수하였다.

• 한국환경보건학회지
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• 제41권3호
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• pp.203-215
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• 2015

Objectives: This study was designed to evaluate the filtration efficiencies and pressure drops of five commercial cloth masks (4 plate type, 1 cup type) in comparison to the performance of a class 1 disposable respirator (reference respirator). A further objective was to evaluate the effects of the number of layers and wash treatment independently on filtration efficiencies and pressure drops. Methods: Polydisperse NaCl aerosols were generated in an aerosol chamber and their concentrations were measured by an optical particle counter (OPC) in the size range of $0.3{\sim}10{\mu}m$ (five channels). Results: The filtration efficiencies of the five cloth masks and the reference respirator were D: 9.5%, C: 18.5%, E: 23.6%, A: 28.5%, B: 29.7% and R: 91.1%, respectively, and the pressure drops through them were C, D: 0.8 Pa, E: 1.7 Pa, B: 6.4 Pa, A: 42.7 Pa and R: 19.3 Pa, respectively. The filtration efficiencies of the cloth masks and reference respirator were below the class 1 respirator criterion (${\geq}94.0%$) of the Ministry of Employment and Labor (MOEL) and Ministry of Food and Drug Safety (MFDS). The pressure drops satisfied the class 1 respirator criterion (${\leq}70Pa$) of MOEL and MFDS. When the cloth masks were folded into two and four layers, the filtration efficiencies of cloth masks A, B, C, D (plate type) increased 1.7-4.6 times, and 2.3-6.8 times, respectively, compared to the efficiencies of the same products in a single layer. Pressure drops increased as the number of layers was increased. The filtration efficiency of cloth mask E with a liner was 1.3 times higher than that of the same mask without a liner, and the pressure drop was lower in the no-liner configuration. After a single washing, the filtration efficiencies of all the cloth mask products decreased 1.04-4.0 times compared to those of the same products intact. For the cloth masks C and E, their filtration efficiencies were significantly decreased after washing (p<0.05). The pressure drops of all cloth masks were 1.2-2.0 times lower after washing. Conclusions: The filtration efficiencies of the five cloth masks were below 30% and did not improve greatly by increasing the number of layers. After a single washing, their performances decreased. Considering the above and other issues identified with cloth masks, such as poor fit and stretched fibers through use, people should not expect protection against particulate matters from the cloth masks on the market.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.250-250
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• 2012

Organic light-emitting diodes (OLED) and polymer light emitting diodes (PLED) have been regarded as the candidate for the next generation light source and flat panel display. Currently, the most common OLED industrial fabrication technology used in producing real products utilizes a fine shadow mask during the thermal evaporation of small molecule materials. However, due to high potential including low cost, easy process and scalability, various researches about solution process are progressed. Since polymer has some disadvantages such as short lifetime and difficulty of purifying, small molecule OLED (SMOLED) can be a good alternative. In this work, we have demonstrated high efficient solution-processed OLED with small molecule. We use CBP (4,4'-N,N'-dicarbazolebiphenyl) as a host doped with green dye (Ir(ppy)3 (fac-tris(2-phenyl pyridine) iridium)). PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole) and TPD (N,N'diphenyl-N,N'-Bis (3-methylphenyl)-[1,1-biphenyl]-4,4'-diamine) are employed as an electron transport material and a hole transport material. And TPBi (2,2',2''-(1,3,5-phenylene) tris (1-phenyl-1H-benzimidazole)) is used as an hole blocking layer for proper hole and electron balance. With adding evaporated TPBi layer, the current efficiency was very improved. Among various parameters, we observed the property of OLED device by changing the thickness of hole transporting layer and solvent which can dissolve organic material. We could make small molecule OLED device with finding proper conditions.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.797-798
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• 2005

We report a novel structure for a full-color AMOLED (Active Matrix Organic Light Emitting Diode) eliminating the patterning process of a blue emitting layer. The patterning of the three primary colors, RGB, is a key technology in the OLED fabrication process. Conventional full color AMOLED containing RGB layers includes the three opportunities of the defects to make an accurate position and fine resolution using various technologies such as fine metal mask, ink-jet printing and laser-induced transfer system. We can skip the blue patterning step by simply stacking the blue layer as a common layer to the whole active area after pixelizing two primary colors, RG, in the conventional small molecular OLED structure. The red and green pixel showed equivalent performances without any contribution of the blue emission.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.387-387
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• 2013

Currently, the flash memory and the dynamic random access memory (DRAM) have been used in a variety of applications. However, the downsizing of devices and the increasing density of recording medias are now in progress. So there are many demands for development of new semiconductor memory for next generation. Magnetic random access memory (MRAM) is one of the prospective semiconductor memories with excellent features including non-volatility, fast access time, unlimited read/write endurance, low operating voltage, and high storage density. MRAM is composed of magnetic tunnel junction (MTJ) stack and complementary metal-oxide semiconductor (CMOS). The MTJ stack consists of various magnetic materials, metals, and a tunneling barrier layer. Recently, MgO thin films have attracted a great attention as the prominent candidates for a tunneling barrier layer in the MTJ stack instead of the conventional Al2O3 films, because it has low Gibbs energy, low dielectric constant and high tunneling magnetoresistance value. For the successful etching of high density MRAM, the etching characteristics of MgO thin films as a tunneling barrier layer should be developed. In this study, the etch characteristics of MgO thin films have been investigated in various gas mixes using an inductively coupled plasma reactive ion etching (ICPRIE). The Cl2/Ar, CH3OH/Ar, and CH4/Ar gas mix were employed to find an optimized etching gas for MgO thin film etching. TiN thin films were employed as a hard mask to increase the etch selectivity. The etch rates were obtained using surface profilometer and etch profiles were observed by using the field emission scanning electron microscopy (FESEM).

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1440-1441
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• 1995

We fabricated diode-type silicon field emitter array device and tested the current-voltage characteristics. Silicon oxide layer having the thickness of $1{\mu}m$ is grown in the (100) oriented n-type silicon substrates. Oxide layer is patterned by the mask with $10{\mu}m$ diameter circles. Silicon substrate is then etched using NAF 1 solution to form the sharp tip arrays as an electron source. In the UHV test station, we tested the current-voltage characteristics for the samples. Turn-on voltage was about 140V and maximum emission current was $310{\mu}A$ at 164V. We studied about silicon bonding process for future work, too.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제14권9호
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• pp.3823-3840
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• 2020

Recently, auto-encoder has emerged as the most popular method in convolutional neural network (CNN) based image compression and has achieved impressive performance. In the traditional auto-encoder based image compression model, the encoder simply sends the features of last layer to the decoder, which cannot allocate bits over different spatial regions in an efficient way. Besides, these methods do not fully exploit the contextual information under different receptive fields for better reconstruction performance. In this paper, to solve these issues, a novel auto-encoder model is designed for image compression, which can effectively transmit the hierarchical features of the encoder to the decoder. Specifically, we first propose an adaptive bit-allocation strategy, which can adaptively select an importance channel. Then, we conduct the multiply operation on the generated importance mask and the features of the last layer in our proposed encoder to achieve efficient bit allocation. Moreover, we present an additional novel perceptual loss function for more accurate image details. Extensive experiments demonstrated that the proposed model can achieve significant superiority compared with JPEG and JPEG2000 both in both subjective and objective quality. Besides, our model shows better performance than the state-of-the-art convolutional neural network (CNN)-based image compression methods in terms of PSNR.