• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.251-251
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• 2016

For several decades, industrial processes consume a huge amount of raw water for various objects that consequently results in the generation of large amounts of wastewater. Wastewaters are consisting of complex mixture of different inorganic and organic compounds and some of them can be toxic, hazardous and hard to degrade. These effluents are mainly treated by conventional technologies such are aerobic and anaerobic treatment and chemical coagulation. But, these processes are not suitable for eliminating all hazardous chemical compounds form wastewater and generate a large amount of toxic sludge. Therefore, other processes have been studied and applied together with these techniques to enhance purification results. These include photocatalysis, absorption, advanced oxidation processes, and ozonation, but also have their own drawbacks. In recent years, electrochemical techniques have received attention as wastewater treatment process that could be show higher purification results. Among them, boron doped diamond (BDD) attract attention as electrochemical electrode due to good chemical and electrochemical stability, long lifetime and wide potential window that necessary properties for anode electrode. So, there are many researches about high quality BDD on Nb, Ta, W and Si substrates, but, their application in effluents treatment is not suitable due to high cost of metal and low conductivity of Si. To solve these problems, Ti has been candidate as substrate in consideration of cost and property. But there are adhesion issues that must be overcome to apply Ti as BDD substrate. Al, Cu, Ti and Nb thin films were deposited on Ti substrate to improve adhesion between substrate and BDD thin film. In this paper, BDD films were deposited by hot filament chemical vapor deposition (HF-CVD) method. Prior to deposition, cleaning processes were conducted in acetone, ethanol, and isopropyl alcohol (IPA) using sonification machine for 7 min, respectively. And metal layer with the thickness of 200 nm were deposited by DC magnetron sputtering (DCMS). To analyze microstructure X-ray diffraction (XRD, Bruker gads) and field emission scanning electron microscopy (FE-SEM, Hitachi) were used. It is confirmed that metal layer was effective to adhesion property and improved electrode property. Electrochemical measurements were carried out in a three electrode electrochemical cell containing a 0.5 % H2SO4 in deionized water. As a result, it is confirmed that metal inter layer heavily effect on BDD property by improving adhesion property due to suppressing formation of titanium carbide.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.311-311
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• 2016

최근 고성능 디스플레이 개발이 요구되면서 기존 비정질 실리콘(a-Si)을 대체할 산화물 반도체에 대한 연구 관심이 급증하고 있다. 여러 종류의 산화물 반도체 중 a-IGZO (amorphous indium-gallium-zinc oxide)가 높은 전계효과 이동도, 저온 공정, 넓은 밴드갭으로 인한 투명성 등의 장점을 가지며 가장 연구가 활발하게 보고되고 있다. 기존에는 SG(단일 게이트) TFT가 주로 제작 되었지만 본 연구에서는 DG(이중 게이트) 구조를 적용하여 고성능의 a-IGZO 기반 박막 트랜지스터(TFT)를 구현하였다. SG mode에서는 하나의 게이트가 채널 전체 영역을 제어하지만, double gate mode에서는 상, 하부 두 개의 게이트가 동시에 채널 영역을 제어하기 때문에 채널층의 형성이 빠르게 이루어지고, 이는 TFT 스위칭 속도를 향상시킨다. 또한, 상호 모듈레이션 효과로 인해 S.S(subthreshold swing)값이 낮아질 뿐만 아니라, 상(TG), 하부 게이트(BG) 절연막의 계면 산란 현상이 줄어들기 때문에 이동도가 향상되고 누설전류 감소 및 안정성이 향상되는 효과를 얻을 수 있다. Dual gate mode로 동작을 시키면, TG(BG)에는 일정한 positive(or negative)전압을 인가하면서 BG(TG)에 전압을 가해주게 된다. 이 때, 소자의 채널층은 depletion(or enhancement) mode로 동작하여 다른 전기적인 특성에는 영향을 미치지 않으면서 문턱 전압을 쉽게 조절 할 수 있는 장점도 있다. 제작된 소자는 p-type bulk silicon 위에 thermal SiO2 산화막이 100 nm 형성된 기판을 사용하였다. 표준 RCA 클리닝을 진행한 후 BG 형성을 위해 150 nm 두께의 ITO를 증착하고, BG 절연막으로 두께의 SiO2를 300 nm 증착하였다. 이 후, 채널층 형성을 위하여 50 nm 두께의 a-IGZO를 증착하였고, 소스/드레인(S/D) 전극은 BG와 동일한 조건으로 ITO 100 nm를 증착하였다. TG 절연막은 BG 절연막과 동일한 조건에서 SiO2를 50 nm 증착하였다. TG는 S/D 증착 조건과 동일한 조건에서, 150 nm 두께로 증착 하였다. 전극 물질과, 절연막 물질은 모두 RF magnetron sputter를 이용하여 증착되었고, 또한 모든 patterning 과정은 표준 photolithography, wet etching, lift-off 공정을 통하여 이루어졌다. 후속 열처리 공정으로 퍼니스에서 질소 가스 분위기, $300^{\circ}C$ 온도에서 30 분 동안 진행하였다. 결과적으로 $9.06cm2/V{\cdot}s$, 255.7 mV/dec, $1.8{\times}106$의 전계효과 이동도, S.S, on-off ratio값을 갖는 SG와 비교하여 double gate mode에서는 $51.3cm2/V{\cdot}s$, 110.7 mV/dec, $3.2{\times}108$의 값을 나타내며 훌륭한 전기적 특성을 보였고, dual gate mode에서는 약 5.22의 coupling ratio를 나타내었다. 따라서 산화물 반도체 a-IGZO TFT의 이중게이트 구조는 우수한 전기적 특성을 나타내며 차세대 디스플레이 시장에서 훌륭한 역할을 할 것으로 기대된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.129-129
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• 2016

Graphene, as a single layer of $sp^2$-bonded carbon atoms packed into a 2D honeycomb crystal lattice, has attracted much attention due to its outstanding properties. In order to synthesize high quality graphene, transition metals, such as nickel and copper, have been widely employed as catalysts, which needs transfer to desired substrates for various applications. However, the transfer steps are not only complicated but also inevitably induce defects, impurities, wrinkles, and cracks of graphene. Furthermore, the direct synthesis of graphene on dielectric surfaces has still been a premature field for practical applications. Therefore, cost effective and concise methods for transfer-free graphene are essentially required for commercialization. Here, we report a facile transfer-free graphene synthesis method through nickel and carbon co-deposited layer. In order to fabricate 100 nm thick NiC layer on the top of $SiO_2/Si$ substrates, DC reactive magnetron sputtering was performed at a gas pressure of 2 mTorr with various Ar : $CH_4$ gas flow ratio and the 200 W DC input power was applied to a Ni target at room temperature. Then, the sample was annealed under 200 sccm Ar flow and pressure of 1 Torr at $1000^{\circ}C$ for 4 min employing a rapid thermal annealing (RTA) equipment. During the RTA process, the carbon atoms diffused through the NiC layer and deposited on both sides of the NiC layer to form graphene upon cooling. The remained NiC layer was removed by using a 0.5 M $FeCl_3$ aqueous solution, and graphene was then directly obtained on $SiO_2/Si$ without any transfer process. In order to confirm the quality of resulted graphene layer, Raman spectroscopy was implemented. Raman mapping revealed that the resulted graphene was at high quality with low degree of $sp^3$-type structural defects. Additionally, sheet resistance and transmittance of the produced graphene were analyzed by a four-point probe method and UV-vis spectroscopy, respectively. This facile non-transfer process would consequently facilitate the future graphene research and industrial applications.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.9
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• pp.535-540
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• 2017

The changes in the electrical characteristics of CMOS ICs due to coupling with a narrow-band electromagnetic wave were analyzed in this study. A magnetron (3 kW, 2.45 GHz) was used as the narrow-band electromagnetic source. The DUT was a CMOS logic IC and the gate output was in the ON state. The malfunction of the ICs was confirmed by monitoring the variation of the gate output voltage. It was observed that malfunction (self-reset) and destruction of the ICs occurred as the electric field increased. To confirm the variation of electrical characteristics of the ICs due to the narrow-band electromagnetic wave, the pin-to-pin resistances (Vcc-GND, Vcc-Input1, Input1-GND) and input capacitance of the ICs were measured. The pin-to-pin resistances and input capacitance of the ICs before exposure to the narrow-band electromagnetic waves were $8.57M{\Omega}$ (Vcc-GND), $14.14M{\Omega}$ (Vcc-Input1), $18.24M{\Omega}$ (Input1-GND), and 5 pF (input capacitance). The ICs exposed to narrow-band electromagnetic waves showed mostly similar values, but some error values were observed, such as $2.5{\Omega}$, $50M{\Omega}$, or 71 pF. This is attributed to the breakdown of the pn junction when latch-up in CMOS occurred. In order to confirm surface damage of the ICs, the epoxy molding compound was removed and then studied with an optical microscope. In general, there was severe deterioration in the PCB trace. It is considered that the current density of the trace increased due to the electromagnetic wave, resulting in the deterioration of the trace. The results of this study can be applied as basic data for the analysis of the effect of narrow-band high-power electromagnetic waves on ICs.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.214.1-214.1
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• 2015

Thin-film transistors (TFTs)의 채널층으로 널리 쓰이는 indium-gallium-zinc oxide (IGZO)는 높은 전자 이동도(약 10 cm2/Vs)를 나타내며 유기 발광 다이오드디스플레이(OLED)와 대면적 액정 디스플레이(LCD)에 필수적으로 사용되고 있다. 하지만, 이러한 재료는 우수한 TFT의 채널층의 특성을 가지는 반면, ZnO 기반 재료이기 때문에 소자 구동에서의 안정성은 가장 큰 문제로 남아있다. 따라서 최근, IGZO layer의 특성을 향상시키기 위한 연구가 다양한 방법으로 시도되고 있다. IGZO의 조성비를 조절하여 전기적 특성을 최적화거나 IGZO layer의 조성 중 Ga을 다른 금속 메탈로 대체하는 연구도 이루어지고 있다. 그러나 IGZO에 미량의 도펀트를 첨가하여 박막 특성 변화를 관찰한 연구는 거의 진행되지 않고 있다. 산화물 TFTs의 전기적 특성과 안정성은 산소 함량에 영향을 많이 받는 것으로 알려져 있으며, 더욱이 TFT 채널층으로 쓰이는 IGZO 박막의 고유한 산소 공공은 디바이스 작동 중 열적으로 활성화 되어 이온화 상태가 될 때 소자의 안정성을 저하시키는 것이 문제점으로 지적되고 있다. 그러므로 본 연구에서는 낮은 전기 음성도(1.22)와 표준전극전위(-2.372 V)를 가지며 산소와의 높은 본드 엔탈피 값(719.6 kJ/mol)을 가짐으로써 산소 공공생성을 억제할 것으로 기대되는 yttrium을 IGZO의 도펀트로 도입하였다. 따라서 본 연구에서는 Y-IGZO의 박막 특성 변화를 관찰하고자 한다. 본 연구에서는 magnetron co-sputtering법으로 IGZO 타깃(DC)과 Y2O3 타깃(RF)를 이용하여 기판 가열 없이 동시 방전을 이용해 non-alkali glass 기판 위에 증착 하였다. IGZO 타깃은 DC power 110 W으로 고정하였으며 Y2O3 타깃에는 RF Power를 50 W에서 110 W까지 증가시키면서 Y 도핑량을 조절하였다. Working pressure는 고 순도 Ar을 20 sccm 주입하여 0.7 Pa로 고정하였다. 모든 실험은 $50{\times}50mm$ 기판 위에 총 두께 $50nm{\pm}2$ 박막을 증착 하였으며, 그 함량에 따른 전기적 특성 및 광학적 특성을 살펴보았다. 또한, IGZO 박막 제조 시 박막의 안정화를 위해 열처리과정은 필수적이다. 하지만 본 연구에서는 열처리를 진행하지 않고 Y-IGZO의 안정성 개선 여부를 보기 위하여 20일 동안 상온에서 방치하여 그 전기적 특성변화를 관찰하였다. 나아가 Y-IGZO 채널 층을 갖는 TFT 소자를 제조하여 소자 구동 특성을 관찰 하였다. Y2O3 타깃에 가해지는 RF Power가 70 W 일 때 Y-IGZO박막은 IGZO박막과 비교하여 상대적으로 캐리어 밀도는 낮은 반면 이동도는 높은 최적 특성을 얻을 수 있었다. 상온방치 결과 Y-IGZO박막은 IGZO박막에 비해 전기적 특성 변화 폭이 적었으며 이것은 Y 도펀트에 의한 안정성 개선의 결과로 예상된다. 투과도는 Y 도핑에 의하여 약 1.6 % 정도 상승하였으며 밴드 갭 내에서 결함 준위로 작용하는 산소공공의 억제로 인한 결과로 판단된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.157-157
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• 2015

Recently, the growing interest in organic microelectronic devices including OLEDs has led to an increasing amount of research into their many potential applications in the area of flexible electronic devices based on plastic substrates. However, these organic devices require a gas barrier coating to prevent the permeation of water and oxygen because organic materials are highly susceptible to water and oxygen. In particular, high efficiency OLEDs require an extremely low water vapor transition rate (WVTR) of $1{\times}10^{-6}g/m^2day$. The Key factor in high quality inorganic gas barrier formation for achieving the very low WVTR required ($1{\times}10^{-6}g/m^2day$) is the suppression of defect sites and gas diffusion pathways between grain boundaries. In this study NBAS process was introduced to deposit enhanced film density single gas barrier layer with a low WVTR. Fig. 1. shows a schematic illustration of the NBAS apparatus. The NBAS process was used for the $Al_2O_3$ nano-crystal structure films deposition, as shown in Fig. 1. The NBAS system is based on the conventional RF magnetron sputtering and it has the electron cyclotron resonance (ECR) plasma source and metal reflector. $Ar^+$ ion in the ECR plasma can be accelerated into the plasma sheath between the plasma and metal reflector, which are then neutralized mainly by Auger neutralization. The neutral beam energy is controlled by the metal reflector bias. The controllable neutral beam energy can continuously change crystalline structures from an amorphous phase to nanocrystal phase of various grain sizes. The $Al_2O_3$ films can be high film density by controllable Auger neutral beam energy. we developed $Al_2O_3$ high dense barrier layer using NBAS process. We can verified that NBAS process effect can lead to formation of high density nano-crystal structure barrier layer. As a result, Fig. 2. shows that the NBAS processed $Al_2O_3$ high dense barrier layer shows excellent WVTR property as a under $2{\times}10^{-5}g/m^2day$ in the single barrier layer of 100nm thickness. Therefore, the NBAS processed $Al_2O_3$ high dense barrier layer is very suitable in the high efficiency OLED application.

• Korean Journal of Materials Research
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• v.20 no.6
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• pp.289-293
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• 2010

Silicon quantum dots (Si QDs) in a superlattice for high efficiency tandem solar cells were fabricated by magnetron rf sputtering and their characteristics were investigated. SiC/$Si_{1-x}C_x$ superlattices were deposited by co-sputtering of Si and C targets and annealed at $1000^{\circ}C$ for 20 minutes in a nitrogen atmosphere. The Si QDs in Si-rich layers were verified by transmission electron microscopy (TEM) and X-ray diffraction. The size of the QDs was observed to be 3-6 nm through high resolution TEM. Some crystal Si and -SiC peaks were clearly observed in the grazing incident X-ray diffractogram. Raman spectroscopy in the annealed sample showed a sharp peak at $516\;cm^{-1}$ which is an indication of Si QDs. Based on the Raman shift the size of the QD was estimated to be 4-6 nm. The volume fraction of Si crystals was calculated to be about 33%. The change of the FT-IR absorption spectrum from a Gaussian shape to a Lorentzian shape also confirmed the phase transition from an amorphous phase before annealing to a crystalline phase after annealing. The optical absorption coefficient also decreased, but the optical band gap increased from 1.5 eV to 2.1 eV after annealing. Therefore, it is expected that the optical energy gap of the QDs can be controlled with growth and annealing conditions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.137-137
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• 2009

Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.151-151
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• 2009

Recently, there has been increasing interest in amorphous oxide semiconductors to find alternative materials for an amorphous silicon or organic semiconductor layer as a channel in thin film transistors(TFTs) for transparent electronic devices owing to their high mobility and low photo-sensitivity. The fabriction of amorphous oxide-based TFTs at room temperature on plastic substrates is a key technology to realize transparent flexible electronics. Amorphous oxides allows for controllable conductivity, which permits it to be used both as a transparent semiconductor or conductor, and so to be used both as active and source/drain layers in TFTs. One of the materials that is being responsible for this revolution in the electronics is indium-zinc-tin oxide(IZTO). Since this is relatively new material, it is important to study the properties of room-temperature deposited IZTO thin films and exploration in a possible integration of the material in flexible TFT devices. In this research, we deposited IZTO thin films on polyethylene naphthalate substrate at room temperature by using magnetron sputtering system and investigated their properties. Furthermore, we revealed the fabrication and characteristics of top-gate-type transparent TFTs with IZTO layers, seen in Fig. 1. The experimental results show that by varying the oxygen flow rate during deposition, it can be prepared the IZTO thin films of two-types; One a conductive film that exhibits a resistivity of $2\times10^{-4}$ ohm${\cdot}$cm; the other, semiconductor film with a resistivity of 9 ohm${\cdot}$cm. The TFT devices with IZTO layers are optically transparent in visible region and operate in enhancement mode. The threshold voltage, field effect mobility, on-off current ratio, and sub-threshold slope of the TFT are -0.5 V, $7.2\;cm^2/Vs$, $\sim10^7$ and 0.2 V/decade, respectively. These results will contribute to applications of select TFT to transparent flexible electronics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.313-313
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• 2009

OLED 소자는 직접발광, 광시야각, 그리고 빠른 응답속도 때문에 동영상에 적합하여 최근 각광받고 있는 디스플레이장치 중의 하나이다. OLED 소자의 양극재료로는 높은 광투과율과 $\sim10^{-4}{\Omega}\;cm$ 수준의 낮은 전기 비저항을 갖는 ITO (Sn-doped $In_2O_3$)가 널리 사용되고 있다. 하지만 원료 물질인 인듐의 수급량 부족으로 인한 문제점과 독성, 저온증착의 어려움, 스퍼터링시 음이온 충격에 의한 막 손상으로 저항의 증가의 문제점이 있고, 또한 액정디스플레이의 투명전극으로 사용될 경우 $400\;^{\circ}C$정도의 높은 온도와 수소 플라즈마 분위기에서 장시간 노출 시 열화로 인한 광학적 특성변화가 문제가 된다. 반면에 Al이 도핑 된 ZnO (AZO)박막은 넓은 밴드갭 (3.37eV)와 400nm에서 700nm 사이의 가시광 영역에서 80% 이상의 우수한 투과성을 지니고 있다. 특히 Al이 도핑된 ZnO는 박막의 전기적 특성이 크게 향상되어 디스플레이나 태양전지로의 응용이 가능하다. 또한 비교적 낮은 비용과 플라즈마에서의 안정성, 무독성, 그리고 전기전도성과 같은 많은 이점이 있다. 그 결과 AZO 박막은 ITO기판을 대안하는 지원물질로 활발히 연구가 진행되고 있다. 본 연구에서는 TCO 박막의 면 저항과 표면 거칠기에 따른 OLED 소자의 특성을 분석하였다. ITO와 AZO 박막은 챔버 내 다양한 가스 분위기(Ar, Ar+$O_2$ and Ar+$H_2$)에서 R.F Magnetron Sputtering방법으로 증착하였다. TCO 박막의 구조적인 이해를 돕기 위해서 X-ray diffraction 과 FESEM으로 분석하였다. 광학적 투과도와 박막의 두께는 ultraviolet spectrophotometer (Varian, cary-500)와 surface profile measurement system으로 각각 측정하였다. 면저항 charge carrier 농도, 그리고 TCO 박막의 이동도와 같은 전기적특성은 four-point probe와 hall effect measurement(HMS-3000)로 각각 측정하였다. TCO 박막의 표면 거칠기 조절을 위해 photo lithography 공정을 사용하여 TCO 박막을 화학에칭 하였다. 미세사이즈 패턴 마스크가 사용되었으며 에칭의 깊이는 에칭시간에 따라 조절하였다. TCO 박막의 표면 형태는 FESEM과 AFM으로 관찰하였다. 투명전극으로 사용되는 ITO 및 AZO 기판 상용화를 위해 ITO 및 AZO 기판 위에 ${\alpha}$-NPB, Alq3, LiF, Al 의 순서로 증착 및 패터닝함으로써 OLED 소자를 제작하였다. 전류밀도와 전압 그리고 발광휘도와 전압과 같은 전기적 특성은 spectrometer(minolta CS-1000A)를 이용하여 측정하였다.