• 전자공학회논문지A
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• 제31A권9호
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• pp.146-155
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• 1994

In this paper, we desribe a new system, called BEST, that is used to develop a macromodel or behavioral model easily. It automatically calculates the component values of macromodel represented by equations to satisfy the given specification. Also, it gives the way to analyze both the behavioral model and transistor level circuit, and then compare the analysis results of them to check the correspondence under specific temperature and bias condition, and BEST optimizes the component values of macromodel. Other feature is to characterize MOSFET as switch model which consists of PWL-RC network. Finally, it is possible to generage multi-level netlist which consists of macro/switch/transistor level circuits, and user can determine the trade-off between simulation speed and accuracy. With the graphic user interface form of macromodel development system described above. BEST enable designers to make macromodel by themselves and to uas it. We applied BEST to develop the macromodel for the test circuit and got the 18.6 times simulation speed up with preserving the accuracy within 10% compared to the conventional transistor level circuit simulation. Also, applicability of optimization capability was verified.

• 한국통신학회논문지
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• 제19권9호
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• pp.1692-1701
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• 1994

이미 상용화된 시뮬레이터인 PSPICE의 기본적인 변형없이 새로운 소자나 시스템을 시뮬레이션하는데 있어 유용한 설계기법인 매크로모델링 기법을 이용하여 위상동기루프를 설계하였다. 위상동기루프는 위상 검출기와 전압제어 발진기, 루프 필터로 이루어져 있고, 이 중 위상 검출기와 전압제어 발진기를 매크로모델링 하였다. 루프 필터단은 외부에서 연결하도록 되어 있으며, 본 논문에서는 간단한 RC 저역통과 필터를 사용하였다. LM565CN PLL의 데이타 시트를 기준으로 설계한 매크로모델 파라미터로 시뮬레이션한 결과, 자유발진 주파수 2.5KHz에서 upper lock range와 lower lock range는 각각 1138Hz, 1500Hz였고, upper capture range와 lower capture range는 563Hz, 437Hz였다. 또한 실험결과와 시뮬레이션 결과가 일치함을 확인하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 ITC-CSCC -2
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• pp.1005-1008
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• 2000

This paper presents a simple method to estimate short-circuit power dissipation and propagation delay for static CMOS logic circuits. Short-circuit current expression is derived by accurately interpolating peak points of actual current curves which is influenced by the gate-to-drain coupling capacitance. The macro model and its expressions estimating the delay of CMOS circuits, which is based on the current modeling expression, are also proposed after investigating the voltage waveforms at transistor output modes. It is shown through simulations that the proposed technique yields better accuracy than previous methods when signal transition time and/or load capacitance decreases, which is a characteristic of the present technological evolution.

• 한국전기전자재료학회논문지
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• 제28권10호
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• pp.658-664
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• 2015

This paper presents an electrical feature analysis of hysteresis curves in memristor differential and intergral control circuit. After making macro model of the memristor device, electric characteristics of the model such as time analysis, frequency dependent DC I-V curves were performed by PSPICE simulation. Also, we made a circuit of memristor-capacitor based on nano-wired memristor device and analyzed the simulated PSPICE results. Finally, we proposed a memristor based differential or integral control circuit, analyzed hysteresis curve characteristic in the control circuit.

• Steel and Composite Structures
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• 제37권3호
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• pp.259-272
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• 2020

In this study a new hysteretic damper for seismic retrofit of soft-first story structures is proposed and its seismic retrofit effect is evaluated. The damper consists of one steel column member and two flexural fuses at both ends made of steel plates with reduced section, which can be placed right beside existing columns in order to minimize interference with passengers and automobiles in the installed bays. The relative displacement between the stories forms flexural plastic hinges at the fuses and dissipate seismic energy. The theoretical formulation and the design procedure based on plastic analysis is provided for the proposed damper, and the results are compared with a detailed finite-element (FE) model. In order to apply the damper in structural analysis, a macromodel of the damper is also developed and calibrated by the derived theoretical formulas. The results are compared with the detailed FE analysis, and the efficiency of the damper is further validated by the seismic retrofit of a case study structure and assessing its seismic performance before and after the retrofit. The results show that the proposed hysteretic damper can be used effectively in reducing damage to soft-first story structures.

• 한국산학기술학회논문지
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• 제11권12호
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• pp.4975-4983
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• 2010

본 논문은 전력전자회로에서 많이 사용되고 있는 가장 범용적이고 강력한 시뮬레이터인 PSPICE와 MATLAB에 적용하여 소자를 모델링하여 보다 쉽게 이해하고, 다양한 제어기술을 적용시킬 수 있도록 미시적인 IGBT, 거시적인 IGBT, PWM 발생기 그리고 유도 전동기를 라이브러리화 하여 모델링의 타당성을 해석하였다. 미시적인 IGBT 모델의 소자특성을 실험을 통해 모델링의 정확성을 입증하였으며, 거시적인 IGBT모델은 사이클로 컨버터와 유도 전동기의 부하를 가진 전압형 PWM 인버터에 적용시켜 시뮬레이션 하였다.