• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.9
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• pp.146-155
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• 1994

In this paper, we desribe a new system, called BEST, that is used to develop a macromodel or behavioral model easily. It automatically calculates the component values of macromodel represented by equations to satisfy the given specification. Also, it gives the way to analyze both the behavioral model and transistor level circuit, and then compare the analysis results of them to check the correspondence under specific temperature and bias condition, and BEST optimizes the component values of macromodel. Other feature is to characterize MOSFET as switch model which consists of PWL-RC network. Finally, it is possible to generage multi-level netlist which consists of macro/switch/transistor level circuits, and user can determine the trade-off between simulation speed and accuracy. With the graphic user interface form of macromodel development system described above. BEST enable designers to make macromodel by themselves and to uas it. We applied BEST to develop the macromodel for the test circuit and got the 18.6 times simulation speed up with preserving the accuracy within 10% compared to the conventional transistor level circuit simulation. Also, applicability of optimization capability was verified.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.9
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• pp.1692-1701
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• 1994

Macromodeling technology is useful to simulate and analyze the performance of new elements and complicated circuits or systems without any changes in today's general simulator, PSPICE. In this paper, Phase Locked Loop(PLL) is designed using macromodeling technique. The PLL macromodel has two basic sub-macromodels of the phase detector and the voltage controlled oscillator(VCO). The PLL macromodel has two open terminals for inserting RC low pass filter. The PLL macromodel is simulated using simulation parameters of LM565CN manufactured in the National company. At a free-running frequency, 2500Hz, upper lock range and lower capture range was 437Hz, 563Hz, respectively. Also, experimental results and simulation results of LM565CN PLL show good agreement.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.1005-1008
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• 2000

This paper presents a simple method to estimate short-circuit power dissipation and propagation delay for static CMOS logic circuits. Short-circuit current expression is derived by accurately interpolating peak points of actual current curves which is influenced by the gate-to-drain coupling capacitance. The macro model and its expressions estimating the delay of CMOS circuits, which is based on the current modeling expression, are also proposed after investigating the voltage waveforms at transistor output modes. It is shown through simulations that the proposed technique yields better accuracy than previous methods when signal transition time and/or load capacitance decreases, which is a characteristic of the present technological evolution.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.10
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• pp.658-664
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• 2015

This paper presents an electrical feature analysis of hysteresis curves in memristor differential and intergral control circuit. After making macro model of the memristor device, electric characteristics of the model such as time analysis, frequency dependent DC I-V curves were performed by PSPICE simulation. Also, we made a circuit of memristor-capacitor based on nano-wired memristor device and analyzed the simulated PSPICE results. Finally, we proposed a memristor based differential or integral control circuit, analyzed hysteresis curve characteristic in the control circuit.

• Steel and Composite Structures
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• v.37 no.3
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• pp.259-272
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• 2020

In this study a new hysteretic damper for seismic retrofit of soft-first story structures is proposed and its seismic retrofit effect is evaluated. The damper consists of one steel column member and two flexural fuses at both ends made of steel plates with reduced section, which can be placed right beside existing columns in order to minimize interference with passengers and automobiles in the installed bays. The relative displacement between the stories forms flexural plastic hinges at the fuses and dissipate seismic energy. The theoretical formulation and the design procedure based on plastic analysis is provided for the proposed damper, and the results are compared with a detailed finite-element (FE) model. In order to apply the damper in structural analysis, a macromodel of the damper is also developed and calibrated by the derived theoretical formulas. The results are compared with the detailed FE analysis, and the efficiency of the damper is further validated by the seismic retrofit of a case study structure and assessing its seismic performance before and after the retrofit. The results show that the proposed hysteretic damper can be used effectively in reducing damage to soft-first story structures.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.12
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• pp.4975-4983
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• 2010

In this paper, the ordinariest and strongest simulator that many used to power electronics circuits and many different control technology can apply to more easily understand modeling the element, PSPICE and MATLAB are adapted a micro IGBT, a macro IGBT, PWM generator and to library moeling of validity of the Induction motor is interpreted. Micro IGBT model of demagnetization quality proved for modeling accuracy to through experiment, macromodel IGBT were simulated which the applied to voltage type PWM inverter to the cyclo-converter and induction motor of demagnetization.