• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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• pp.204-208
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• 2004

Embedded business will be expanded market more and more since customers seek more wearable and ubiquitous systems. Cellular telephones, PDAs, notebooks and portable multimedia devices could bring higher microprocessor revenues and more rewarding improvements in performance and functions. Increasing battery capacity is still creeping along the roadmap. Until a small practical fuel cell becomes available, microprocessor developers must come up with power-reduction methods. According to MPR 2003, the instruction and data caches of ARM920T processor consume $44\%$ of total processor power. The rest of it is split into the power consumptions of the integer core, memory management units, bus interface unit and other essential CPU circuitry. And the relationships among CPU, peripherals and caches may change in the future. The processor working on higher operating frequency will exact larger cache RAM and consume more energy. In this paper, we propose advanced low power trace cache which caches traces of the dynamic instruction stream, and reduces cache access times. And we evaluate the performance of the trace cache and estimate the power of the trace cache, which is compared with conventional cache.

• Journal of Power Electronics
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• 제11권6호
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• pp.931-937
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• 2011

This paper presents a method for the performance improvement of a shunt active power filter (SAPF) using the indirect current control (ICC) scheme. Compared to the conventional direct current control (DCC) scheme, the ICC gives better performance with a lower number of sensors. A simplified and efficient control algorithm using a low cost Intel 80C196KC microcontroller is implemented using only two current sensors for the source current and one voltage sensor for the DC-link voltage of the SAPF circuit. The objective is to eliminate harmonics and to compensate the reactive power produced by non-linear loads such as an uncontrolled rectifier feeding an inductive load. The APF is realized using a three phase voltage source inverter (VSI) with a dc bus capacitor. Experimental results are presented to prove the better performance of the ICC method over the DCC one.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.825-829
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• 2005

This paper presents an approach for designing a fuzzy logic-based adaptive SVC damping In controller for damping low frequency power oscillations. Power systems are often subject to low Frequency electro-mechanical oscillations resulting from electrical disturbances. Generally, power system stabilizers are designed to provide damping against this kind of oscillations. Another means to achieve damping is to design supplementary damping controllers that are equipped with SVC. Various approaches are available for designing such controllers, many of which are based on the concepts of damping torque and others which treat the damping controller design as a generic control problem and apply various control theories on it. In our proposed approach, linear optimal controllers are designed and then a fuzzy logic tuning mechanism is constructed to generate a single control signal. The controller uses the system operating condition and a fuzzy logic signal tuner to blend the control signals generated by two linear controllers, which are designed using an optimal control method. First, we design damping controllers for the two extreme conditions; the control action for intermediate conditions is determined by the fuzzy logic tuner. The more the operating condition belongs to one of the two fuzzy sets, the stronger the contribution of the control signal from that set in the output signal. Simulation studies done on a one-machine infinite-bus and a four-machine two-area test system, show that the proposed fuzzy adaptive damping SVC controller effectively enhances the damping of low frequency oscillations.

• Journal of Electrical Engineering and Technology
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• 제9권1호
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• pp.27-36
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• 2014

This paper presents an adaptive wide-area damping controller (WADC) based on generalized predictive control (GPC) and model identification for damping the inter-area low frequency oscillations in large-scale inter-connected power system. A recursive least-squares algorithm (RLSA) with a varying forgetting factor is applied to identify online the reduced-order linearlized model which contains dominant inter-area low frequency oscillations. Based on this linearlized model, the generalized predictive control scheme considering control output constraints is employed to obtain the optimal control signal in each sampling interval. Case studies are undertaken on a two-area four-machine power system and the New England 10-machine 39-bus power system, respectively. Simulation results show that the proposed adaptive WADC not only can damp the inter-area oscillations effectively under a wide range of operation conditions and different disturbances, but also has better robustness against to the time delay existing in the remote signals. The comparison studies with the conventional lead-lag WADC are also provided.

• Journal of Electrical Engineering and Technology
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• 제1권2호
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• pp.216-225
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• 2006

This paper presents a new circuit topology of DC busline switch and snubbing capacitor-assisted full-bridge soft-switching PWM inverter type DC-DC power converter with a high frequency link for low voltage large current applications as DC feeding systems, telecommunication power plants, automotive DC bus converters, plasma generator, electro plating plants, fuel cell interfaced power conditioner and arc welding power supplies. The proposed power converter circuit is based upon a voltage source-fed H type full-bridge high frequency PWM inverter with a high frequency transformer link. The conventional type high frequency inverter circuit is modified by adding a single power semiconductor switching device in series with DC rail and snubbing lossless capacitor in parallel with the inverter bridge legs. All the active power switches in the full-bridge inverter arms and DC busline can achieve ZVS/ZVT turn-off and ZCS turn-on commutation operation. Therefore, the total switching losses at turn-off and turn-on switching transitions of these power semiconductor devices can be reduced even in the high switching frequency bands ranging from 20 kHz to 100 kHz. The switching frequency of this DC-DC power converter using IGBT power modules is selected to be 60 kHz. It is proved experimentally by the power loss analysis that the more the switching frequency increases, the more the proposed DC-DC converter can achieve high performance, lighter in weight, lower power losses and miniaturization in size as compared to the conventional hard switching one. The principle of operation, operation modes, practical and inherent effectiveness of this novel DC-DC power converter topology is proved for a low voltage and large current DC-DC power supplies of arc welder applications in industry.

• Journal of Electrical Engineering and Technology
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• 제7권5호
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• pp.664-671
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• 2012

This paper presents the application of Unified Power Flow Controller (UPFC) in order to simultaneous control of power flow and voltage and also damping of Low Frequency Oscillations (LFO) at a Single-Machine Infinite-Bus (SMIB) power system installed with UPFC. PI type controllers are commonly used controllers for UPFC control. But for the sake of some drawbacks of PI type controllers, the scope for finding a better control scheme still remains. In this regard, in this paper the new IP type controllers are considered as UPFC controllers. The parameters of these IP type controllers are tuned using Genetic Algorithms (GA). Also a stabilizer supplementary controller based UPFC is considered for increasing power system damping. To show the ability of IP controllers, this controller is compared with classical PI type controllers. Simulation results emphasis on the better performance of IP controller in comparison with PI controller.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2005년도 춘계종합학술대회
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• pp.547-550
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• 2005

본 논문에서는 기존의 하드디스크가 가지고 있는 단점을 개선하기 위하여 반도체 소자인 Flash Memory를 이용한 ATA 버스 방식의 Flash Memory Drive를 설계 및 구현하고 성능을 평가하였다. 일반적인 하드디스크의 경우, 외부의 충격에 비교적 민감하며 이로 인해 데이터의 손상이나 디스크의 오류가 발생되게 된다. 또한 내부적인 구조로 인하여 구동 시 많은 전류를 필요로 하며 경량화에 어려움이 있다. 그러나 반도체 소자인 Flash Memory를 이용하여 하드디스크를 제작하게 되면 소전류로도 구동이 가능하며 경량화가 가능할 뿐만 아니라 특히 외부의 충격에 강하므로 자동차, 선박, 산업용과 더불어 군사용으로의 활용이 가능할 것으로 기대된다.

• Journal of applied mathematics & informatics
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• 제28권1_2호
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• pp.539-551
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• 2010

Low scalability and power efficiency of the shared bus in SoCs is a motivation to use on chip networks instead of traditional buses. In this paper we have modified the Orion power model to reach an analytical model to estimate the average message energy in K-Ary n-Cubes with focus on the number of virtual channels. Afterward by using the power model and also the performance model proposed in [11] the effect of number of virtual channels on Energy-Delay product have been analyzed. In addition a cycle accurate power and performance simulator have been implemented in VHDL to verify the results.

• Journal of Power Electronics
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• 제1권2호
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• pp.107-116
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• 2001

Two AC-DC PWM full-bridge converters that can input current to improve input power factor while performing dc-dc conversion are investigated in this paper. Both converters are simple in that they are similar to the standard PWM full-bridge converter with a diode rectifier/LC low-pass filter input, and both can operate with a simple method of PWM control. In the paper, the operation of the converters is explained and their steady-state characteristics are discussed. The feasibility of the converters and their ability to meet EN61000-3-2 Class D Standards for electrical equipment are shown with results obtained from experimental prototypes. The performance of both converters in terms of dc bus voltage level, input power factor and efficiency is compared and discussed.

• 조명전기설비학회논문지
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• 제22권6호
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• pp.26-33
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• 2008

본 연구에서는 일반적으로 용접기의 전원장치로 사용되어지는 풀-브리지 회로에 1개의 스위치와 1개의 무손실스너버 부분 공진 커패시터로 구성된 간단한 액티브 보조 부분 공진 스너버를 추가한 새로운 풀-브리지 소프트 스위칭 PWM DC-DC 컨버터를 제안하였다. 제안한 풀-브리지 소프트 스위칭 DC-DC 컨버터 회로는 각 액티브 스위치에 인가된 전압이 DC 버스 라인 전압의 1/2로 되기 때문에 AC 400(V)계 상용전원 라인에 적용할 경우에도 600(V)내압의 스위칭 소자(IGBT)가 적용 가능하며, 기존 회로의 DC버스 라인 스위치에 발생되는 도통 손실을 저감하여 고주파 변압기의 1차측의 전류가 2차측보다 작아지는 저 전압, 대전류 직류 출력을 얻어 수 있었다. 그리고 모든 영역에서 ZCS/ZVS 동작함으로써 저전압, 대전류 직류 출력의 스위칭 전원 장치에 있어 고주파, 고효율, 고출력을 실현할 수 있다. 이러한 모든 사항은 시뮬레이션과 실험 결과로부터 도출하였으며, 제안한 회로의 단점을 보완할 경우에는 차세대형 TIG MIG MAG 아크 용접기용 전원으로 용이할 것으로 판단된다.