• Title/Summary/Keyword: Low voltage stress

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A Polysilicon Field Effect Transistor Pressure Sensor of Thin Nitride Membrane Choking Effect of Right After Turn-on for Stress Sensitivity Improvement (스트레스 감도 향상을 위한 턴 온 직후의 조름 효과를 이용한 얇은 질화막 폴리실리콘 전계 효과 트랜지스터 압력센서)

  • Jung, Hanyung;Lee, Junghoon
    • Journal of Sensor Science and Technology
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    • v.23 no.2
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    • pp.114-121
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    • 2014
  • We report a polysilicon active area membrane field effect transistor (PSAFET) pressure sensor for low stress deflection of membrane. The PSAFET was produced in conventional FET semiconductor fabrication and backside wet etching. The PSAFET located at the front side measured pressure change using 300 nm thin-nitride membrane when a membrane was slightly strained by the small deflection of membrane shape from backside with any physical force. The PSAFET showed high sensitivity around threshold voltage, because threshold voltage variation was composed of fractional function form in sensitivity equation of current variation. When gate voltage was biased close to threshold voltage, a fractional function form had infinite value at $V_{tn}$, which increased the current variation of sensitivity. Threshold voltage effect was dominant right after the PSAFET was turned on. Narrow transistor channel established by small current flow was choked because electron could barely cross drain-source electrodes. When gate voltage was far from threshold voltage, threshold voltage effect converged to zero in fractional form of threshold voltage variations and drain current change was mostly determined by mobility changes. As the PSAFET fabrication was compatible with a polysilicon FET in CMOS fabrication, it could be adapted in low pressure sensor and bio molecular sensor.

A New Low Loss Quasi Parallel Resonant DC-Link Inverter with Variable Lossless Zero Voltage Duration (무손실 가변 영전압 구간을 갖는 새로운 저손실 준 병렬공진 직류-링크 인버터)

  • 권경안;김권호;최익;정용채;박민용
    • The Transactions of the Korean Institute of Power Electronics
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    • v.2 no.2
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    • pp.8-18
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    • 1997
  • In this paper, a New Low Loss Quasi-Parallel Resonant DC-Link(NLQPRDCL) Inverter which shows highly improved PWM capability, low loss characteristic and low voltage stress is presented. A method to minimize freewheeling interval, which is able to largely decrease DC-link operation losses and to steadily guarantee soft switching in the wide operation region is also proposed. In addition, lossless control of zero voltage duration of DC-link makes the proposed inverter maintain the advanced PWM capability even under a very low modulation index. Experiment and simulation were performed to verify validity of the proposed inverter topology.

Effective Positive Bias Recovery for Negative Bias Stressed sol-gel IGZO Thin-film Transistors (음 바이어스 스트레스를 받은 졸-겔 IGZO 박막 트랜지스터를 위한 효과적 양 바이어스 회복)

  • Kim, Do-Kyung;Bae, Jin-Hyuk
    • Journal of Sensor Science and Technology
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    • v.28 no.5
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    • pp.329-333
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    • 2019
  • Solution-processed oxide thin-film transistors (TFTs) have garnered great attention, owing to their many advantages, such as low-cost, large area available for fabrication, mechanical flexibility, and optical transparency. Negative bias stress (NBS)-induced instability of sol-gel IGZO TFTs is one of the biggest concerns arising in practical applications. Thus, understanding the bias stress effect on the electrical properties of sol-gel IGZO TFTs and proposing an effective recovery method for negative bias stressed TFTs is required. In this study, we investigated the variation of transfer characteristics and the corresponding electrical parameters of sol-gel IGZO TFTs caused by NBS and positive bias recovery (PBR). Furthermore, we proposed an effective PBR method for the recovery of negative bias stressed sol-gel IGZO TFTs. The threshold voltage and field-effect mobility were affected by NBS and PBR, while current on/off ratio and sub-threshold swing were not significantly affected. The transfer characteristic of negative bias stressed IGZO TFTs increased in the positive direction after applying PBR with a negative drain voltage, compared to PBR with a positive drain voltage or a drain voltage of 0 V. These results are expected to contribute to the reduction of recovery time of negative bias stressed sol-gel IGZO TFTs.

A Single-Stage Power Factor Correction Converter for 90-265$V_{rms}$ Line Applications (90-265$V_{rms}$ 입력범위를 갖는 단일전력단 역률개선 컨버터)

  • 구관본
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.145-149
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    • 2000
  • A single-stage power factor correction AC/DC converter with a simple link voltage suppressing circuit (LVSC) for the universal line application is proposed. Using this simple circuit a low link voltage can be realized without deadbands at line zero-crossings. The proposed converter is analyzed and a prototype converter with 5C, 12V output is implemented to verify the performance. The experimental results show that the link voltage stress and efficiency are about 447V and 81%, respectively.

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A Modularized Charge Equalization Converter for a Hybrid Electric Vehicle Lithium-Ion Battery Stack

  • Park, Hong-Sun;Kim, Chong-Eun;Kim, Chol-Ho;Moon, Gun-Woo;Lee, Joong-Hui
    • Journal of Power Electronics
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    • v.7 no.4
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    • pp.343-352
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    • 2007
  • This paper proposes a modularized charge equalization converter for hybrid electric vehicle (HEV) lithium-ion battery cells, in which the intra-module and the inter-module equalizer are Implemented. Considering the high voltage HEV battery pack, over approximately 300V, the proposed equalization circuit modularizes the entire $M^*N$ cells; in other words, M modules in the string and N cells in each module. With this modularization, low voltage stress on all the electronic devices, below roughly 64V, can be obtained. In the intra-module equalization, a current-fed DC/DC converter with cell selection switches is employed. By conducting these selection switches, concentrated charging of the specific under charged cells can be performed. On the other hand, the inter-module equalizer makes use of a voltage-fed DC/DC converter for bi-directional equalization. In the proposed circuit, these two converters can share the MOSFET switch so that low cost and small size can be achieved. In addition, the absence of any additional reset circuitry in the inter-module equalizer allows for further size reduction, concurrently conducting the multiple cell selection switches allows for shorter equalization time, and employing the optimal power rating design rule allows fur high power density to be obtained. Experimental results of an implemented prototype show that the proposed equalization scheme has the promised cell balancing performance for the 7Ah HEV lithium-ion battery string while maintaining low voltage stress, low cost, small size, and short equalization time.

A Study on the High Power-Factor AC/DC converter using Resonant Auxiliary Circuit (공진형 보조 회로를 이용한 고역률 AC/DC 컨버터에 관한 연구)

  • Han, Dae-Hee;Kim, Yang;Baek, Soo-Hyun;Bae, Jin-Yang;Kim, Pil-Soo
    • Proceedings of the KIEE Conference
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    • 2002.07b
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    • pp.1110-1113
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    • 2002
  • A Single-Stage Single-Switch power-factor- correction(PFC) AC/DC Converter with universal input is presented in this paper. The PFC Converter can be achieved based upon the continuous current mode(CCM). The switch has less current and voltage stresses over a wide range of load variation so that a low voltage rating device can be used. The presented converter features high power factor high efficiency, and low cost. An 90W prototype was implemented to show that it has 70% efficiency with low voltage stress over universal line input.

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Low Pull-in Voltage MEMS Switches for Wireless Applications (저전압구동 무선통신용 MEMS 스위치)

  • Shim, Dong-Ha;Lee, Moon-Chul;Lee, Eun-Sung;Park, Sun-Hee;Kim, Young-Il;Song, In-Sang
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1969-1971
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    • 2002
  • This paper presents the design and performance of low pull-in voltage MEMS switches for commercial cellular/PCS applications. The switches have all-metal (3 ${\mu}m$ thick Au) movable plates over CPW(Coplanar Waveguide) transmission line. The stress gradient in a movable plate is considered in mechanical design to obtain an accurate pull-in voltage. Series metal-to-metal contact switches are fabricated and evaluated. Those switches exhibit the low loss(<0.2 dB @1.9 GHz) with good isolation(55 dB @1.9 GHz).

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Multi-Level Active-Clamp Forward Converter

  • Park, Ki-Bum;Kim, Chong-Eun;Moon, Gun-Woo;Youn, Myung-Joong
    • Proceedings of the KIPE Conference
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    • 2007.07a
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    • pp.188-189
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    • 2007
  • Conventional active-clamp forward converter shows good performance in low power applications, however it suffers from a high voltage stress of switch and is not suitable for high input voltage applications. To solve this problem, a new multi-level active-clamp forward converter is proposed in this paper. Utilizing low rating switches, the proposed converter features high efficiency and low cost promising for high input voltage applications.

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A Characteristics on Impedance of Degraded Thyristor with Heat and Voltage Stress (열화된 사이리스터 소자의 임피던스 특성)

  • Seo, Kil-Soo;Kim, Hyung-Woo;Kim, Ki-Hyun;Kim, Nam-Kyun
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1351-1352
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    • 2006
  • In this paper, the impedance properties of degraded thyristor with heat and voltage were presented. As degraded thyristor, 8 thyristors with each other different reverse blocking voltage used. Its impedance and resistance properties were measured from frequency 100Hz to 10MHz applied with bias voltage from 0V to 40V. As a result, at low frequency region, that is, at the frequency 100-10kHz, the abrupt increasement of its capacitance was confirmed. And also, at high frequency region, the capacitance peak move toward low frequency in the region of frequency 4 - 6MHz as degradation of thyristor.

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An Active Clamp High Step-Up Boost Converter with a Coupled Inductor

  • Luo, Quanming;Zhang, Yang;Sun, Pengju;Zhou, Luowei
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.86-95
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    • 2015
  • An active clamp high step-up boost converter with a coupled inductor is proposed in this paper. In the proposed strategy, a coupled inductor is adopted to achieve a high voltage gain. The clamp circuit is included to achieve the zero-voltage-switching (ZVS) condition for both the main and clamp switches. A rectifier composed of a capacitor and a diode is added to reduce the voltage stress of the output rectifier diode. As a result, diodes with a low reverse-recovery time and forward voltage-drop can be utilized. Since the voltage stresses of the main and clamp switches are far below the output voltage, low-voltage-rated MOSFETs can be adopted to reduce conduction losses. Moreover, the reverse-recovery losses of the diodes are reduced due to the inherent leakage inductance of the coupled inductor. Therefore, high efficiency can be expected. Firstly, the derivation of the proposed converter is given and the operation analysis is described. Then, a steady-state performance analysis of the proposed converter is analyzed in detail. Finally, a 250 W prototype is built to verify the analysis. The measured maximum efficiency of the prototype is 95%.